6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-28 06:24:57 +00:00
Code Issues Projects Releases Wiki Activity
101,911 Commits 39 Branches 0 Tags
bd48d31b37cbde04b51daec14139f7f10fdf4878
Commit Graph

35 Commits

Author SHA1 Message Date
Tom Stellard
eb7876083d R600/SI: Use correct dest register class for V_READFIRSTLANE_B32 
This instructions writes to an 32-bit SGPR.  This change required adding
the 32-bit VCC_LO and VCC_HI registers, because the full VCC register
is 64 bits.

This fixes verifier errors on several of the indirect addressing piglit
tests.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204055 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-17 17:03:51 +00:00
Rafael Espindola
b9e06b97ce Remove MCPureStreamer. 
We moved MCJIT to use native object formats a long time ago and R600
now uses ELF, so it was dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202408 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-27 16:17:34 +00:00
Rafael Espindola
9d96045528 Remove the last hasRawTextSupport call from R600. 
There is nothing wrong with printing the disassembly section when printing
text. An hypothetical assembler would then produce a .o just like our
direct object emission produces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200583 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-31 22:14:06 +00:00
Rafael Espindola
b8f1606076 Replace another use with hasRawTextSupport+EmitRawText with emitRawComment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200582 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-31 22:08:19 +00:00
Rafael Espindola
f7af9eac1b Use emitRawComment to avoid a call to hasRawTextSupport. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200581 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-31 21:54:49 +00:00
Rafael Espindola
888177e91b Add back spaces I missed in the conversion to emitRawComments. 
Sorry about that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200171 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-27 00:19:41 +00:00
Rafael Espindola
e881f38db6 Use emitRawComment instead of EmitRawText. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200170 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-27 00:16:00 +00:00
Tom Stellard
0ed0ced91c R600: Add stack size to .AMDGPUcsdata section 
reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199837 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-22 21:55:35 +00:00
Matt Arsenault
b9271b0ec5 Move declaration of variables down to first use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198794 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-08 21:47:14 +00:00
Matt Arsenault
17427fa9bb Use llvm_unreachable instead of assert(0) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196971 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-10 21:37:42 +00:00
Matt Arsenault
87234703e8 R600/SI: Add comments for number of used registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196467 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-05 05:15:35 +00:00
Matt Arsenault
29a651af8a Indentation fixes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194688 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-14 10:08:50 +00:00
Tom Stellard
54328c772c R600/SI: Add compute support for CI v2 
v2:
  - Fix LDS size calculation

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193621 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-29 16:37:28 +00:00
Tom Stellard
f9e5c39811 R600/SI: Use S_LOAD_DWORD instructions for v8i32 and v16i32 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193212 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-23 00:44:12 +00:00
Matt Arsenault
8305cae004 R600/SI: Don't assert on SCC usage 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193198 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-22 21:11:31 +00:00
Tom Stellard
f931867317 R600: Store disassembly in a special ELF section when feature +DumpCode is enabled. 
Patch by: Jay Cornwall

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192523 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-12 05:02:51 +00:00
Michel Danzer
a3e39dc705 R600/SI: Initial local memory support 
Enough for the radeonsi driver to use it for calculating derivatives.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186012 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-10 16:37:07 +00:00
Tom Stellard
e3d4cbc7d2 R600: Add local memory support via LDS 
Reviewed-by: Vincent Lejeune<vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185162 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-28 15:47:08 +00:00
Tom Stellard
3ff0abfaab R600: Rework subtarget info and remove AMDILDevice classes 
This should simplify the subtarget definitions and make it easier to
add new ones.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183566 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 20:37:48 +00:00
Benjamin Kramer
5c35290fa3 Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182594 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-23 17:10:37 +00:00
Tom Stellard
f07b5373d7 R600: Emit config values in register / value pairs 
Reviewed-by: Vincent Lejeune <vljn@ovi.com>
Tested-By: Aaron Watry <awatry@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181228 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-06 17:50:51 +00:00
Vincent Lejeune
86cdb70417 R600: config section now reports use of killgt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180751 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-30 00:13:13 +00:00
Tom Stellard
87cba4a4c1 R600: Use SHT_PROGBITS for the .AMDGPU.config section 
The libelf implementation that is distributed here:
http://www.mr511.de/software/english.html
will not parse sections that are marked SHT_NULL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180230 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-24 23:56:14 +00:00
Vincent Lejeune
2a74639bc7 R600: Use .AMDGPU.config section to emit stacksize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180124 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-23 17:34:12 +00:00
Vincent Lejeune
141ca7fc64 R600: Emit used GPRs count 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179684 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-17 15:17:25 +00:00
Tom Stellard
9a256300f8 R600/SI: Emit config values in register value pairs. 
Instead of emitting config values in a predefined order, the code
emitter will now emit a 32-bit register index followed by the 32-bit
config value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179546 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-15 17:51:35 +00:00
Tom Stellard
bf1efe6421 R600/SI: Emit configuration value in the .AMDGPU.config ELF section 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179545 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-15 17:51:30 +00:00
Christian Konig
4d0e8a8a3e R600/SI: dynamical figure out the reg class of MIMG 
Depending on the number of bits set in the writemask.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179166 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-10 08:39:16 +00:00
Christian Konig
cc22640c4c R600/SI: rework input interpolation v2 
v2: update CMakeLists.txt as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176626 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-07 09:04:14 +00:00
Christian Konig
e25e490793 R600/SI: cleanup literal handling v3 
Seems to be allot simpler, and also paves the
way for further improvements.

v2: rebased on master, use 0 in BUFFER_LOAD_FORMAT_XYZW,
    use VGPR0 in dummy EXP, avoid compiler warning, break
    after encoding the first literal.
v3: correctly use V_ADD_F32_e64

This is a candidate for the stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175354 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-16 11:28:22 +00:00
Tom Stellard
184f5c1545 R600/SI: cleanup VGPR encoding 
Remove all the unused code.

Patch by: Christian König

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174656 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-07 19:39:45 +00:00
Tom Stellard
36ba909184 R600/SI: Add basic support for more integer vector types. 
v1i32, v2i32, v8i32 and v16i32.

Only add VGPR register classes for integer vector types, to avoid attempts
copying from VGPR to SGPR registers, which is not possible.

Patch By: Michel Dänzer

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174632 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-07 17:02:09 +00:00
Tom Stellard
3ce2ec8478 R600: Emit function name in the AsmPrinter 
Emitting the function name allows us to check for it in the FileCheck
tests so we can make sure FileCheck is checking the output of the
correct function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174392 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-05 17:09:11 +00:00
Chandler Carruth
58a2cbef4a Resort the #include lines in include/... and lib/... with the 
utils/sort_includes.py script.

Most of these are updating the new R600 target and fixing up a few
regressions that have creeped in since the last time I sorted the
includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171362 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-01-02 10:22:59 +00:00
Tom Stellard
f98f2ce29e Add R600 backend 
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-11 21:25:42 +00:00