Jim Grosbach
918f55fe23
Allow MCCodeEmitter access to the target MCRegisterInfo.
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Add the MCRegisterInfo to the factories and constructors.
Patch by Tom Stellard <Tom.Stellard@amd.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156828 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15 17:35:52 +00:00
Craig Topper
bc2198133a
Convert assert(0) to llvm_unreachable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-07 02:50:20 +00:00
Owen Anderson
4f8dc7b17a
Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148833 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 18:37:29 +00:00
David Blaikie
4d6ccb5f68
More dead code removal (using -Wunreachable-code)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 21:51:11 +00:00
Evan Cheng
8cb2d61bce
Refactor MBlaze target to separate MC routines from Target routines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:18:18 +00:00
