19181 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
5d348b4dc4 Add 256-bit isel for movsldup/movshdup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136051 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:32 +00:00
Bruno Cardoso Lopes
9123c6fea0 More movsldup/movshdup cleanup. Rewrite the mask matching function and add
support for 256-bit versions (but no instruction selection yet, coming next).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:28 +00:00
Bruno Cardoso Lopes
5f6c440e53 More cleanup, subtarget info isn't used here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:25 +00:00
Bruno Cardoso Lopes
cc1c3526a7 Add 128-bit AVX versions of movshdup/mosldup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:23 +00:00
Bruno Cardoso Lopes
3e9235c720 Cleanup movsldup/movshdup matching.
27 insertions(+), 62 deletions(-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:13 +00:00
Evan Cheng
28c85a81a1 Rename createCodeEmitter to createMCCodeEmitter; createObjectStreamer to createMCObjectStreamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:42:34 +00:00
Chandler Carruth
0682597817 Remove a file from CMakeLists.txt that Evan removed in r136027.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:30:33 +00:00
Evan Cheng
94b9550a32 Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:24:13 +00:00
Chandler Carruth
b35552d440 Clean up a pile of hacks in our CMake build relating to TableGen.
The first problem to fix is to stop creating synthetic *Table_gen
targets next to all of the LLVM libraries. These had no real effect as
CMake specifies that add_custom_command(OUTPUT ...) directives (what the
'tablegen(...)' stuff expands to) are implicitly added as dependencies
to all the rules in that CMakeLists.txt.

These synthetic rules started to cause problems as we started more and
more heavily using tablegen files from *subdirectories* of the one where
they were generated. Within those directories, the set of tablegen
outputs was still available and so these synthetic rules added them as
dependencies of those subdirectories. However, they were no longer
properly associated with the custom command to generate them. Most of
the time this "just worked" because something would get to the parent
directory first, and run tablegen there. Once run, the files existed and
the build proceeded happily. However, as more and more subdirectories
have started using this, the probability of this failing to happen has
increased. Recently with the MC refactorings, it became quite common for
me when touching a large enough number of targets.

To add insult to injury, several of the backends *tried* to fix this by
adding explicit dependencies back to the parent directory's tablegen
rules, but those dependencies didn't work as expected -- they weren't
forming a linear chain, they were adding another thread in the race.

This patch removes these synthetic rules completely, and adds a much
simpler function to declare explicitly that a collection of tablegen'ed
files are referenced by other libraries. From that, we can add explicit
dependencies from the smaller libraries (such as every architectures
Desc library) on this and correctly form a linear sequence. All of the
backends are updated to use it, sometimes replacing the existing attempt
at adding a dependency, sometimes adding a previously missing dependency
edge.

Please let me know if this causes any problems, but it fixes a rather
persistent and problematic source of build flakiness on our end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:09:08 +00:00
Evan Cheng
78c10eeaa5 Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to createMCAsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:24:55 +00:00
Jim Grosbach
f49433523e ARM assembly parsing and encoding for SSAT16 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136006 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:09:14 +00:00
Bruno Cardoso Lopes
863bd9d5cf Codegen allonesvector better while using AVX: vpcmpeqd + vinsertf128
This also fixes PR10452

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:32 +00:00
Bruno Cardoso Lopes
51e92e8e41 Add remaining 256-bit vector bitcasts. This also fixes PR10451
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:28 +00:00
Bruno Cardoso Lopes
6a32adc4e5 - Handle special scalar_to_vector case: splats. Using a native 128-bit
shuffle before inserting on a 256-bit vector.
- Add AVX versions of movd/movq instructions
- Introduce a few COPY patterns to match insert_subvector instructions.
This turns a trivial insert_subvector instruction into a register copy,
coalescing the xmm into a ymm and avoid emiting on more instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136002 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:25 +00:00
Bruno Cardoso Lopes
233fa39245 Reintroduce r135730, this is indeed the right approach, there is no
native 256-bit vector instruction to do scalar_to_vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:16 +00:00
Benjamin Kramer
a3d782f40c Add a note about efficient codegen for binary log.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 22:30:00 +00:00
Jim Grosbach
580f4a9c1c ARM assembly parsing and encoding for SSAT instruction.
Fix the Rn register encoding for both SSAT and USAT. Update the parsing of the
shift operand to correctly handle the allowed shift types and immediate ranges
and issue meaningful diagnostics when an illegal value or shift type is
specified. Add aliases to parse an ommitted shift operand (default value of
'lsl #0').

Add tests for diagnostics and proper encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 22:20:28 +00:00
Evan Cheng
617793d1d6 Refactoring fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 22:16:37 +00:00
Evan Cheng
f16f3476a2 Move CBackend and CppBackend MC initialization to TargetInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135982 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 21:44:12 +00:00
Eli Friedman
63f8dde482 Get rid of an incorrect optimization for shuffles with PALIGNR and simplify isPALIGNRMask.
Addresses PR10466, although the crash from that PR only triggers in cases where DAGCombine misses optimizing a shuffle.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135980 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 21:36:45 +00:00
Evan Cheng
275944afb5 Fix more MC layering violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135979 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 21:32:49 +00:00
Evan Cheng
d1200aa4f8 More MC layering violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 21:29:26 +00:00
Rafael Espindola
5160d38166 Add LLVMAddTargetLibraryInfo to the C API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135975 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 21:20:54 +00:00
Evan Cheng
4b64e8a9e1 Separate MCInstPrinter registration from AsmPrinter registration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 21:20:24 +00:00
Jim Grosbach
e4616ace02 Simply ARM so_reg MIOperandInfo definitions.
The shift immediate encoding, printing, etc. is handled directly by the
enclosing operand definition, so it should be a vanilla immediate, not a
nested complex operand (shift_imm).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135968 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 21:04:58 +00:00
Evan Cheng
1b0fc9b418 Fix last bits of MC layer issues. llvm-mc doesn't need to initialize TargetMachine's anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:53:02 +00:00
Jim Grosbach
af6981f2f5 ARM asm operand renaming. Make things a bit more explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:49:51 +00:00
Jim Grosbach
5f6c133d7d More simple cleanup of ARM asm operand definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135958 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:38:18 +00:00
Evan Cheng
54134708f5 Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135954 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:18:48 +00:00
Evan Cheng
8cb2d61bce Refactor MBlaze target to separate MC routines from Target routines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:18:18 +00:00
Bill Wendling
39055b3a5c Update the comment. This feature is available only on Darwin at the moment. Though it's not Darwin-specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:15:15 +00:00
Jim Grosbach
43904299b0 Make assembly parser method names more consistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135950 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:14:50 +00:00
Oscar Fuentes
7331ac47b9 Unbreak the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135949 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:13:36 +00:00
Jim Grosbach
1610a70965 Tidy up formatting.
Remove some inititalizers that are the same as the default, move defs next to
their (singular) uses and generally simplify some formatting of asm operand
definitions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135946 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:06:30 +00:00
Jim Grosbach
1e93b24246 Tidy up a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135945 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:00:32 +00:00
Evan Cheng
b024572444 Missed a file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135943 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 19:55:33 +00:00
Evan Cheng
966aeb5788 Refactor PPC target to separate MC routines from Target routines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135942 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 19:53:23 +00:00
Evan Cheng
a87e40f16f More refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135939 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 19:33:48 +00:00
Evan Cheng
8c3fee5903 Refactor X86 target to separate MC code from Target code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135930 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 18:43:53 +00:00
Bill Wendling
c57e7dbfaf Changed disabled code into a flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135924 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 18:04:49 +00:00
Bill Wendling
091a864f06 Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135923 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 18:01:27 +00:00
Bill Wendling
09b02c8ddd After we've modified the prolog to save volatile registers, generate the compact
unwind encoding for that function. This simply crawls through the prolog looking
for machine instrs marked as "frame setup". It can calculate from these what the
compact unwind should look like.

This is currently disabled because of needed linker support. But initial tests
look good.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 18:00:28 +00:00
Roman Divacky
d5601cc810 Set PPCII::MO_DARWIN_STUB only on MacOSX < 10.5.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135866 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-24 08:22:56 +00:00
NAKAMURA Takumi
883d99f70b ARMMCTargetDesc.h: Fixup to add DataTypes.h, or uint32_t would be unavailable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135837 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-23 01:16:22 +00:00
Evan Cheng
a7cfc08ebe Move TargetAsmParser.h TargetAsmBackend.h and TargetAsmLexer.h to MC where they belong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135833 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-23 00:45:41 +00:00
Evan Cheng
7f8dff6571 createXXXMCCodeGenInfo should be static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135826 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-23 00:01:04 +00:00
Evan Cheng
be74029f44 Sink ARM mc routines into MCTargetDesc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135825 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-23 00:00:19 +00:00
Jim Grosbach
4a5ffb399f ARM SSAT instruction 5-bit immediate handling.
The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield.
Update the representation such that we store the operand as 0-31, allowing us
to remove the encoder method and the special case handling in the disassembler.
Update the assembly parser and the instruction printer accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135823 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22 23:16:18 +00:00
Jim Grosbach
bf2845c0d8 ARM assembly parsing and encoding updates.
Tests for SMULBB, SMLALBT, SMLALTB, SMLALTT, and SMULL. Fix parsing of SMULLS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135817 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22 22:06:05 +00:00
Evan Cheng
e78085a3c0 Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22 21:58:54 +00:00