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341 Commits

Author SHA1 Message Date
Reid Spencer
b83eb6447b For PR950: 
This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of just using ConstantInt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31063 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-20 07:07:24 +00:00
Bill Wendling
c70ddad2b7 Partially in response to PR926: insert the newly created machine basic 
blocks into the basic block list when lowering the switch inst. into a
binary tree of if-then statements. This allows the "visitSwitchCase" func
to allow for fall-through behavior.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31057 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-19 21:46:38 +00:00
Jim Laskey
c7c3f110ed Pass AliasAnalysis thru to DAGCombiner. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30984 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-16 20:52:31 +00:00
Evan Cheng
8b2794aeff Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-13 21:14:26 +00:00
Andrew Lenharth
82c3d8f81a Jimptables working again on alpha. 
As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30873 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 04:29:42 +00:00
Chris Lattner
755480681c add two helper methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30869 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 03:58:02 +00:00
Evan Cheng
466685d41a Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-09 20:57:25 +00:00
Chris Lattner
e0cfc8b2f2 jump tables handle pic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30776 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 22:32:29 +00:00
Evan Cheng
786225adf0 Make use of getStore(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 23:01:46 +00:00
Evan Cheng
693163e74d Fix some typos that can cause a flag value to have more than one use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30727 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-04 22:23:53 +00:00
Chris Lattner
57f9a43c64 refactor critical edge breaking out into the SplitCritEdgesForPHIConstants method. 
This is a baby step towards fixing PR925.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30643 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-28 06:17:10 +00:00
Andrew Lenharth
16113431e8 Comments on JumpTableness 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30615 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-26 20:02:30 +00:00
Andrew Lenharth
beec30eaf3 Add support for other relocation bases to jump tables, as well as custom asm directives 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30593 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-24 19:45:58 +00:00
Evan Cheng
2ae5b87996 PIC jump table entries are always 32-bit. This fixes PIC jump table support on X86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30590 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-24 05:22:38 +00:00
Andrew Lenharth
3fbd67898e absolute addresses must match pointer size 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30461 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-18 17:59:35 +00:00
Chris Lattner
c970f062e0 If LSR went through a lot of trouble to put constants (e.g. the addr of a global 
in a specific BB, don't undo this!).  This allows us to compile
CodeGen/X86/loop-hoist.ll into:

_foo:
        xorl %eax, %eax
***     movl L_Arr$non_lazy_ptr, %ecx
        movl 4(%esp), %edx
LBB1_1: #cond_true
        movl %eax, (%ecx,%eax,4)
        incl %eax
        cmpl %edx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

instead of:

_foo:
        xorl %eax, %eax
        movl 4(%esp), %ecx
LBB1_1: #cond_true
***     movl L_Arr$non_lazy_ptr, %edx
        movl %eax, (%edx,%eax,4)
        incl %eax
        cmpl %ecx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

This was noticed in 464.h264ref.  This doesn't usually affect PPC,
but strikes X86 all the time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30290 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 06:02:42 +00:00
Chris Lattner
c66764c007 This code was trying too hard. By eliminating redundant edges in the CFG 
due to switch cases going to the same place, it make #pred != #phi entries,
breaking live interval analysis.

This fixes 458.sjeng on x86 with llc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30236 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 06:36:57 +00:00
Chris Lattner
6ddf8ed6fe Implement the fpowi now by lowering to a libcall 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 06:03:30 +00:00
Chris Lattner
d5e93c0795 Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel inserted 
too many phi operands when lowering a switch to branches in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30142 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 01:59:34 +00:00
Chris Lattner
09e460662a Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:31:13 +00:00
Chris Lattner
a4f0b3a084 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 12:54:02 +00:00
Chris Lattner
be384162c6 minor changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29740 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-16 22:57:46 +00:00
Chris Lattner
f9f37fc52c eliminate use of getNode that takes vector of valuetypes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29687 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-14 23:53:35 +00:00
Chris Lattner
bd564bfc63 Start eliminating temporary vectors used to create DAG nodes. Instead, pass 
in the start of an array and a count of operands where applicable.  In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap.  In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.

I updated a lot of code calling getNode that takes a vector, but ran out of
time.  The rest of the code should be updated, and these methods should be
removed.

We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.

It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-08 02:23:42 +00:00
Chris Lattner
3700f90c19 Work around a GCC 3.3.5 bug noticed by a user. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29490 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-03 00:18:59 +00:00
Jim Laskey
eb577ba3b8 Final polish on machine pass registries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29471 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-02 12:30:23 +00:00
Jim Laskey
9373beba60 Now that the ISel is available, it's possible to create a default instruction 
scheduler creator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29452 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 19:14:14 +00:00
Jim Laskey
9ff542f2cc 1. Change use of "Cache" to "Default". 
2. Added argument to instruction scheduler creators so the creators can do
special things.
3. Repaired target hazard code.
4. Misc.

More to follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29450 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 18:29:48 +00:00
Jim Laskey
13ec702c43 Introducing plugable register allocators and instruction schedulers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29434 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 14:21:23 +00:00
Evan Cheng
8825a485e2 PIC jump table entries are always 32-bit even in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29422 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 01:03:13 +00:00
Nate Begeman
4d9bbdc440 Code cleanups, per review 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29347 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 16:46:58 +00:00
Nate Begeman
2f1ae88445 Support jump tables when in PIC relocation model 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29318 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 01:13:04 +00:00
Chris Lattner
a15cf7045e Mems can be in the output list also. This is the second half of a fix for 
PR833


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29224 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 19:02:21 +00:00
Chris Lattner
9525528a7d Use hidden visibility to make symbols in an anonymous namespace get 
dropped.  This shrinks libllvmgcc.dylib another 67K


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28975 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 23:17:24 +00:00
Evan Cheng
a844126c43 Consistency. EXTRACT_ELEMENT index operand should have ptr type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28795 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:11:54 +00:00
Chris Lattner
a3bb86dd6b Make sure to update the CFG correctly if a switch only has a default dest. 
This fixes CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28755 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 18:25:29 +00:00
Chris Lattner
0c48fd4610 Fix X86/inline-asm.ll:test2, a case where an input value was implicitly 
truncated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28733 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-08 18:27:11 +00:00
Chris Lattner
cf752aa502 Fix Regression/CodeGen/X86/inline-asm.ll, a case where inline asm causes 
implement extension of a register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28731 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-08 18:22:48 +00:00
Evan Cheng
d61c4820c9 Make CALL node consistent with RET node. Signness of value has type MVT::i32 
instead of MVT::i1. Either is fine except MVT::i32 is probably a legal type
for most (if not all) platforms while MVT::i1 is not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28511 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 23:13:20 +00:00
Evan Cheng
8e7d056bc5 Change RET node to include signness information of the return values. e.g. 
RET chain, value1, sign1, value2, sign2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28509 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 23:09:09 +00:00
Evan Cheng
f6d62c2e2a CALL node change: now including signness of every argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28461 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:55:32 +00:00
Evan Cheng
80235d508e -enable-unsafe-fp-math implies -enable-finite-only-fp-math 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28437 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 18:18:46 +00:00
Vladimir Prus
124729155d Fix missing include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28435 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 13:43:15 +00:00
Evan Cheng
f6f9581983 Incorrect SETCC CondCode used for FP comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28433 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 06:40:47 +00:00
Chris Lattner
d202ca4d98 Fix the result of the call to use a correct vbitconvert. There is no need to 
use getPackedTypeBreakdown at all here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28365 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 20:49:36 +00:00
Chris Lattner
1b8daae71b Correct a previous patch which broke CodeGen/PowerPC/vec_call.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28364 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 20:43:21 +00:00
Evan Cheng
6c43f35d74 Fixed a LowerCallTo and LowerArguments bug. They were introducing illegal 
VBIT_VECTOR nodes. There were some confusion about the semantics of
getPackedTypeBreakdown(). e.g. for <4 x f32> it returns 1 and v4f32, not 4,
and f32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28352 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 18:16:39 +00:00
Chris Lattner
da098e7d10 Add support for calls that pass and return legal vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28340 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 23:39:44 +00:00
Chris Lattner
f4ec817299 Add a new ISD::CALL node, make the default impl of TargetLowering::LowerCallTo 
produce it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28338 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 22:53:20 +00:00
Chris Lattner
8c0c10c2b9 Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend, 
it doesn't currently use/maintain the chain properly.  Also, make the
X86ISelLowering.cpp file 80-col clean.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 06:45:34 +00:00