Charles Davis
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0d82fe77f2
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Add retw and lretw instructions. Also, fix Intel syntax parsing for all
ret instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154468 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-04-11 01:10:53 +00:00 |
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Devang Patel
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885f65b4a1
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Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,sd,ps,pd}, for intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149291 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-01-30 22:47:12 +00:00 |
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Devang Patel
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3b96e1fe3b
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Intel Syntax: Extend special hand coded logic, to recognize special instructions, for intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148864 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-01-24 21:43:36 +00:00 |
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Devang Patel
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fdd3b30151
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Intel syntax: Parse ... PTR [-8]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148570 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-01-20 21:21:01 +00:00 |
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Devang Patel
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cf0e269d16
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Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148569 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-01-20 21:14:06 +00:00 |
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Devang Patel
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a951f77ca3
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Post process 'and', 'sub' instructions and select better encoding, if available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148489 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-01-19 18:40:55 +00:00 |
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Devang Patel
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e60540f380
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Intel syntax: There is no need to create unary expr for simple negative displacement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148486 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-01-19 18:15:51 +00:00 |
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Devang Patel
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ac0f048602
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Post process 'xor', 'or' and 'cmp' instructions and select better encoding, if available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148485 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-01-19 17:53:25 +00:00 |
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