Owen Anderson
a835f00702
Make this testcase independent of register allocation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157761 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 18:07:02 +00:00
Owen Anderson
f917d20561
Switch the canonical FMA term operand order to match both the comment I wrote and the usual LLVM convention.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157708 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:54:50 +00:00
Owen Anderson
85ef6f4c99
Teach DAGCombine to canonicalize the position of a constant in the term operands of an FMA node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157707 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:50:39 +00:00
Owen Anderson
062c0a5b58
Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just like it now knows for FMULs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156029 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02 22:17:40 +00:00
Lang Hames
7787800481
Fix the order of the operands in the llvm.fma intrinsic patterns for ARM,
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<rdar://problem/11325085>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155724 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27 18:51:24 +00:00
Evan Cheng
7ece9539c2
On Darwin targets, only use vfma etc. if the source use fma() intrinsic explicitly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154689 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 18:59:28 +00:00
Evan Cheng
14b4c03580
Add more fused mul+add/sub patterns. rdar://10139676
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154484 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 06:59:47 +00:00
Evan Cheng
92c904539a
Match (fneg (fma) to vfnma. rdar://10139676
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154469 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 01:21:25 +00:00
Evan Cheng
a0908d0a44
Merge fma.ll into fusedMAC.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154466 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 01:03:11 +00:00
Sebastian Pop
74bebde7c4
updated patch for the ARM fused multiply add/sub
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In this update:
- I assumed neon2 does not imply vfpv4, but neon and vfpv4 imply neon2.
- I kept setting .fpu=neon-vfpv4 code attribute because that is what the
assembler understands.
Patch by Ana Pazos <apazos@codeaurora.org>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152036 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05 17:39:52 +00:00
Anton Korobeynikov
4b4e62219b
Add fused multiple+add instructions from VFPv4.
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Patch by Ana Pazos!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-22 12:07:33 +00:00
