252 Commits

Author SHA1 Message Date
Eric Christopher
ce0f74d412 Migrate ABIName to MCTargetOptions so that it can be shared between
the TargetMachine level and the MC level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225891 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 00:50:31 +00:00
Eric Christopher
c559ba7251 Add a new string member to the TargetOptions struct for the name
of the abi we should be using. For targets that don't use the
option there's no change, otherwise this allows external users
to set the ABI via string and avoid some of the -backend-option
pain in clang.

Use this option to move the ABI for the ARM port from the
Subtarget to the TargetMachine and update the testcases
accordingly since it's no longer valid to set via -mattr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224492 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-18 02:20:58 +00:00
Matthias Braun
8ac056b9dd Enable MachineVerifier in debug mode for X86, ARM, AArch64, Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224075 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 23:18:03 +00:00
Matthias Braun
5b17297b3d [CodeGen] Add print and verify pass after each MachineFunctionPass by default
Previously print+verify passes were added in a very unsystematic way, which is
annoying when debugging as you miss intermediate steps and allows bugs to stay
unnotice when no verification is performed.

To make this change practical I added the possibility to explicitely disable
verification. I used this option on all places where no verification was
performed previously (because alot of places actually don't pass the
MachineVerifier).
In the long term these problems should be fixed properly and verification
enabled after each pass. I'll enable some more verification in subsequent
commits.

This is the 2nd attempt at this after realizing that PassManager::add() may
actually delete the pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224059 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 21:26:47 +00:00
Rafael Espindola
428923cfe2 This reverts commit r224043 and r224042.
check-llvm was failing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224045 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 20:03:57 +00:00
Matthias Braun
e9256e340b Enable machineverifier in debug mode for X86, ARM, AArch64, Mips
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224043 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 19:42:09 +00:00
Matthias Braun
71f56c4aac [CodeGen] Add print and verify pass after each MachineFunctionPass by default
Previously print+verify passes were added in a very unsystematic way, which is
annoying when debugging as you miss intermediate steps and allows bugs to stay
unnotice when no verification is performed.

To make this change practical I added the possibility to explicitely disable
verification. I used this option on all places where no verification was
performed previously (because alot of places actually don't pass the
MachineVerifier).
In the long term these problems should be fixed properly and verification
enabled after each pass. I'll enable some more verification in subsequent
commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224042 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 19:42:05 +00:00
Reid Kleckner
d12434058d Add out of line virtual destructors to all LLVMTargetMachine subclasses
These recently all grew a unique_ptr<TargetLoweringObjectFile> member in
r221878.  When anyone calls a virtual method of a class, clang-cl
requires all virtual methods to be semantically valid. This includes the
implicit virtual destructor, which triggers instantiation of the
unique_ptr destructor, which fails because the type being deleted is
incomplete.

This is just part of the ongoing saga of PR20337, which is affecting
Blink as well. Because the MSVC ABI doesn't have key functions, we end
up referencing the vtable and implicit destructor on any virtual call
through a class. We don't actually end up emitting the dtor, so it'd be
good if we could avoid this unneeded type completion work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222480 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 23:37:18 +00:00
Aditya Nandakumar
847729d19a This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221878 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-13 09:26:31 +00:00
Eric Christopher
e6f32be8df Add subtarget caches to aarch64, arm, ppc, and x86.
These will make it easier to test further changes to the
code generation and optimization pipelines as those are
moved to subtargets initialized with target feature and
target cpu.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219106 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-06 06:45:36 +00:00
Eric Christopher
1340986490 We can grab the options struct from the TargetMachine, no need to
pass it down in the constructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218929 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 00:10:03 +00:00
Eric Christopher
d5dd8ce2a5 Reinstate "Nuke the old JIT."
Approved by Jim Grosbach, Lang Hames, Rafael Espindola.

This reinstates commits r215111, 215115, 215116, 215117, 215136.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216982 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-02 22:28:02 +00:00
Robin Morisset
cf165c36ee Rename AtomicExpandLoadLinked into AtomicExpand
AtomicExpandLoadLinked is currently rather ARM-specific. This patch is the first of
a group that aim at making it more target-independent. See
http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-August/075873.html
for details

The command line option is "atomic-expand"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216231 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-21 21:50:01 +00:00
Jonathan Roelofs
4c3be1aa0f Add a thread-model knob for lowering atomics on baremetal & single threaded systems
http://reviews.llvm.org/D4984


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216182 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-21 14:35:47 +00:00
Eric Christopher
aa5b9c0f6f Temporarily Revert "Nuke the old JIT." as it's not quite ready to
be deleted. This will be reapplied as soon as possible and before
the 3.6 branch date at any rate.

Approved by Jim Grosbach, Lang Hames, Rafael Espindola.

This reverts commits r215111, 215115, 215116, 215117, 215136.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215154 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 22:02:54 +00:00
Rafael Espindola
875710a2fd Nuke the old JIT.
I am sure we will be finding bits and pieces of dead code for years to
come, but this is a good start.

Thanks to Lang Hames for making MCJIT a good replacement!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215111 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 14:21:18 +00:00
Eric Christopher
373c16a702 Move all of the ARM subtarget features down onto the subtarget
rather than the target machine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211799 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 19:30:02 +00:00
Eric Christopher
d2f9358649 Add a new subtarget hook for whether or not we'd like to enable
the atomic load linked expander pass to run for a particular
subtarget. This requires a check of the subtarget and so save
the TargetMachine rather than only TargetLoweringInfo and update
all callers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211314 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-19 21:03:04 +00:00
Eric Christopher
887a5c7f5d Move ARMJITInfo off of the TargetMachine and down onto the subtarget.
This required untangling a mess of headers that included around.

This a recommit of r210953 with a fix for the removed accessor
for JITInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211233 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-18 22:48:09 +00:00
James Molloy
408519765b Refactor the disabling of Thumb-1 LDM/STM generation
Originally I switched the LD/ST optimizer off in TargetMachine as it was previously, but Eric has suggested he'd prefer that it be short-circuited in the pass itself.

No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211037 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 16:42:53 +00:00
Eric Christopher
47d34abdb0 Temporarily revert r210953 in an attempt to bring the ARM buildbots
back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210996 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 19:55:14 +00:00
Eric Christopher
53551e2476 Remove InstrItineraryData off of the TargetMachine - it's already
on the subtarget and just forward the accessor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210955 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 23:11:13 +00:00
Eric Christopher
58c99da4d8 Move ARMJITInfo off of the TargetMachine and down onto the subtarget.
This required untangling a mess of headers that included around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210953 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 23:04:46 +00:00
Eric Christopher
f7a2d5e387 Move ARMSelectionDAGInfo from the TargetMachine to the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210862 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 00:20:39 +00:00
Eric Christopher
1ee246100e Move to a private function to initialize subtarget dependencies
so we can use initializer lists for the ARMSubtarget and then
use this to initialize a moved DataLayout on the subtarget from
the TargetMachine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210861 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 00:20:35 +00:00
Eric Christopher
9a81e28056 Have ARMSelectionDAGInfo take a DataLayout as it's argument as the
DAG has access to the subtarget and TargetSelectionDAGInfo only
needs a DataLayout.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210859 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 23:39:49 +00:00
James Molloy
5eba90a861 Disable the load/store optimization pass for Thumb-1.
Moritz's changes have improved codegen a lot, but further testing showed significant correctness problems. Disable by default until these have been worked out.

Patch by Moritz Roth!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210789 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 15:18:33 +00:00
Tim Northover
d0dbe02fd2 ARM & AArch64: make use of common cmpxchg idioms after expansion
The C and C++ semantics for compare_exchange require it to return a bool
indicating success. This gets mapped to LLVM IR which follows each cmpxchg with
an icmp of the value loaded against the desired value.

When lowered to ldxr/stxr loops, this extra comparison is redundant: its
results are implicit in the control-flow of the function.

This commit makes two changes: it replaces that icmp with appropriate PHI
nodes, and then makes sure earlyCSE is called after expansion to actually make
use of the opportunities revealed.

I've also added -{arm,aarch64}-enable-atomic-tidy options, so that
existing fragile tests aren't perturbed too much by the change. Many
of them either rely on undef/unreachable too pervasively to be
restored to something well-defined (particularly while making sure
they test the same obscure assert from many years ago), or depend on a
particular CFG shape, which is disrupted by SimplifyCFG.

rdar://problem/16227836

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209883 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 10:09:59 +00:00
James Molloy
2c9f8a715e Enable the Load/Store optimization pass for Thumb1 but make it return immediately for now.
Patch by Moritz Roth!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208991 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-16 14:11:38 +00:00
Tim Northover
09da6b5540 Atomics: promote ARM's IR-based atomics pass to CodeGen.
Still only 32-bit ARM using it at this stage, but the promotion allows
direct testing via opt and is a reasonably self-contained patch on the
way to switching ARM64.

At this point, other targets should be able to make use of it without
too much difficulty if they want. (See ARM64 commit coming soon for an
example).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206485 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-17 18:22:47 +00:00
Tim Northover
badb137729 ARM: expand atomic ldrex/strex loops in IR
The previous situation where ATOMIC_LOAD_WHATEVER nodes were expanded
at MachineInstr emission time had grown to be extremely large and
involved, to account for the subtly different code needed for the
various flavours (8/16/32/64 bit, cmpxchg/add/minmax).

Moving this transformation into the IR clears up the code
substantially, and makes future optimisations much easier:

1. an atomicrmw followed by using the *new* value can be more
   efficient. As an IR pass, simple CSE could handle this
   efficiently.
2. Making use of cmpxchg success/failure orderings only has to be done
   in one (simpler) place.
3. The common "cmpxchg; did we store?" idiom can be exposed to
   optimisation.

I intend to gradually improve this situation within the ARM backend
and make sure there are no hidden issues before moving the code out
into CodeGen to be shared with (at least ARM64/AArch64, though I think
PPC & Mips could benefit too).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205525 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 11:44:58 +00:00
Renato Golin
421397ac00 Remove duplicated DMB instructions
ARM specific optimiztion, finding places in ARM machine code where 2 dmbs
follow one another, and eliminating one of them.

Patch by Reinoud Elhorst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205409 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 09:03:43 +00:00
Christian Pirker
3a64202502 ARM: rename ARMle/ARMbe with ARMLE/ARMBE, and Thumble/Thumbbe with ThumbLE/ThumbBE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205317 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 15:19:30 +00:00
Saleem Abdulrasool
171d09a9af ARM: fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205233 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-31 18:09:10 +00:00
Christian Pirker
1f072c36d0 Add ARM big endian Target (armeb, thumbeb)
Reviewed at http://llvm-reviews.chandlerc.com/D3095



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205007 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-28 14:35:30 +00:00
Craig Topper
ac732eb207 Prune includes in ARM target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204548 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-22 23:51:00 +00:00
Craig Topper
d11898db4c [C++11] Add 'override' keyword to virtual methods that override their base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203433 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 02:09:33 +00:00
Tim Northover
4bcb985295 GlobalMerge: move "-global-merge" option to the pass itself.
It's rather odd to have the flag enabling and disabling this pass only affect a
single target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201559 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-18 11:17:29 +00:00
Rafael Espindola
8e0f67dcec Make the llvm mangler depend only on DataLayout.
Before this patch any program that wanted to know the final symbol name of a
GlobalValue had to link with Target.

This patch implements a compromise solution where the mangler uses DataLayout.
This way, any tool that already links with Target (llc, clang) gets the exact
behavior as before and new IR files can be mangled without linking with Target.

With this patch the mangler is constructed with just a DataLayout and DataLayout
is extended to include the information the Mangler needs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198438 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 19:21:54 +00:00
Rafael Espindola
960ede2e1d Synchronize the NaCl DataLayout strings with the ones in clang.
Patch by Derek Schuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197640 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-19 00:44:37 +00:00
Tim Northover
c95108f213 ARM: update comment to match reality
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197570 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-18 14:18:36 +00:00
Tim Northover
e66345aed4 ARM: set default float ABI based on triple.
Clang sets the float-abi target option manually, but no longer
annotates each function with its ABI. This can lead to confusing
mistmatch between "clang -emit-llvm | llc" and normal clang
invocations.

Besides which, gnueabihf actually *is* hard-float. Defaulting to soft
was just perverse.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197554 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-18 09:27:33 +00:00
Rafael Espindola
a5dd89e3c5 On APCS, only try to align aggregates to 32 bits instead of 64.
This matches clang's behavior and since it is only a preference, it is not
an ABI issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197526 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-17 21:36:54 +00:00
Rafael Espindola
3179bf24b4 Handle i64 first for clarity. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197524 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-17 21:28:36 +00:00
Rafael Espindola
c4bc055bb4 One last cleanup of LLVM's DataLayout strings.
Produce them in the same order on every target. The order is that of
getStringRepresentation: e|E-i*-f*-v*-a*-s*-n*-S*.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197411 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-16 19:31:14 +00:00
Rafael Espindola
ea53c6ae30 The preferred alignment defaults to the abi alignment. Omit if it is the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197400 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-16 18:01:51 +00:00
Rafael Espindola
1cf81e6244 Simplify the datalayout string of ARM and AArch64.
No functionality change.

Reviewed by Tim Northover.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197172 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-12 17:43:37 +00:00
Rafael Espindola
b6c1f7e9f0 Add comments documenting the ARM datalayout string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196850 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 00:37:37 +00:00
Rafael Espindola
eaa38c1689 Simplify further.
Thanks to Jim Grosbach for noticing it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196846 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 00:15:35 +00:00
Rafael Espindola
757fb9069c Refactor the construction of the DataLayout string on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196843 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 23:56:41 +00:00