6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-11-04 05:17:07 +00:00
Code Issues Projects Releases Wiki Activity
73,886 Commits 39 Branches 0 Tags
d155945f15f73eb5619756d94e69b5bc5319d89a
Commit Graph

18856 Commits

Author SHA1 Message Date
Akira Hatanaka
9c3d57c45e Custom-lower FCOPYSIGN nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132074 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 19:32:07 +00:00
Eli Friedman
783c66414a Prepare ARMFastISel::SelectSIToFP for getRegForValue returning registers for i8 and i16 values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132073 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 19:09:45 +00:00
Akira Hatanaka
4c62f765a3 Update MaxCallFrameSize regardless of the relocation model selected. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132070 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 18:08:32 +00:00
Akira Hatanaka
f15f498507 Change initial value of MaxCallFrameSize. MipsFI::getMaxCallFrameSize() should 
return 0 if there are no function calls made. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132065 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 17:52:48 +00:00
Akira Hatanaka
edacba83dc Coding style fixes. Added comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132063 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 17:32:06 +00:00
Francois Pichet
1b47720391 Remove unused OpcodeMask enumerator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132062 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 17:02:53 +00:00
Francois Pichet
d9e57c146d Fix MSVC warning: "is out of range for enum constant" 
MSVC doesn't support 64 bit enum. 
OpcodeMask is not used anywhere in the code base.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132057 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 15:58:10 +00:00
Cameron Zwarich
da86a08284 Restore an accidentally removed comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132044 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:48:17 +00:00
Cameron Zwarich
8e9bace414 Move some code to a more logical place. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132043 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:45:29 +00:00
Cameron Zwarich
106acd4158 Make tTAILJMPr/tTAILJMPrND emit a tBX without a preceding MOV of PC to LR. This 
fixes <rdar://problem/9495913>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132042 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:45:27 +00:00
Cameron Zwarich
328634598f Change the order of tBX's operands so that the predicate operands come after the 
target register, matching BX. I filed this bug because I was confused at first:

PR10007 - ARM branch instructions have inconsistent predicate operand placement
<http://llvm.org/bugs/show_bug.cgi?id=10007>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132041 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:45:23 +00:00
Cameron Zwarich
8f161c3a95 Rename tBX_Rm to tBX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132040 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:45:20 +00:00
Cameron Zwarich
b36c1ae6d5 Rename the existing tBX/tBXr9 instructions to tBX_CALL/tBXr9_CALL to better 
reflect their actual meaning and match the ARM instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132039 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:45:14 +00:00
Rafael Espindola
fc2bb8c444 Replace the -unwind-tables option with a per function flag. This is more 
LTO friendly as we can now correctly merge files compiled with or without
-fasynchronous-unwind-tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132033 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 03:44:17 +00:00
Akira Hatanaka
053546c31e Fix lowering of DYNAMIC_STACKALLOC nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132030 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 02:20:00 +00:00
Bruno Cardoso Lopes
56926a3961 Fix PR9762 
Enable the parsing of the operand "cpsr_all" for the ARM msr instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132026 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 00:35:03 +00:00
Eric Christopher
4db7dec70b Implement the arm 'L' asm modifier. 
Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132024 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 23:27:13 +00:00
Eric Christopher
e1739d598d Implement the immediate part of the 'B' modifier. 
Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132023 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 23:15:43 +00:00
Eric Christopher
fef50062ea Add more unimplemented asm modifiers and some documentation of what they 
do.

Part of rdar://9119939.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132015 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 22:27:43 +00:00
Eric Christopher
0628d38085 Add support for the arm 'y' asm modifier. 
Fixes part of rdar://9444657


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132011 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 22:10:34 +00:00
Akira Hatanaka
ce98deb9f5 Enable printing of immediates that do not fit in 16-bit. .cprestore can have 
offsets that are larger than 0x10000.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132003 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 21:22:21 +00:00
Akira Hatanaka
4231c7ea6d Implement byval structure argument passing. The following limitations or 
deficiencies exist:

- Works only if ABI is o32.
- Zero-sized structures cannot be passed.
- There is a lot of redundancy in generated code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131986 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 19:18:33 +00:00
Devang Patel
8ec0c1c07b Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131974 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 18:27:52 +00:00
Charles Davis
6b918b8466 Add a method to TargetRegisterInfo to get the register number that the Win64 EH 
scheme uses internally. Implement it for x86 (the only architecture that LLVM
supports for which this matters right now).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131969 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 16:57:53 +00:00
Evan Cheng
b5a55d979c - Teach SelectionDAG::isKnownNeverZero to return true (op x, c) when c is 
non-zero.
- Teach X86 cmov optimization to eliminate the cmov from ctlz, cttz extension
  when the source of X86ISD::BSR / X86ISD::BSF is proven to be non-zero.

rdar://9490949


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131948 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 01:48:22 +00:00
Akira Hatanaka
b4d8d31e59 Simplify offset calculation of stack frame objects for $gp restore location and 
variable arguments in LowerCall and LowerFormalArguments. This should also fix
the bug in which handling of variable arguments is incorrect when the front-end
optimizes away unused fixed arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131942 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 00:23:52 +00:00
Akira Hatanaka
46da136ec7 Expand f64 FPOW. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131928 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-23 22:23:58 +00:00
Akira Hatanaka
f89532f8f6 Add pattern for double-to-integer conversion. Patch by Sasa Stankovic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131927 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-23 22:16:43 +00:00
Akira Hatanaka
bdd2ce9741 Fixes related to coding style. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131922 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-23 21:13:59 +00:00
Akira Hatanaka
f8928c07e7 Fix MipsAsmPrinter::printSavedRegsBitmaskChange. Remove functions and variables 
in MipsFunctionInfo that are no longer used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131917 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-23 20:34:30 +00:00
Chris Lattner
32232fc2b5 clarify this, apparently it is confusing :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131916 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-23 20:17:44 +00:00
Akira Hatanaka
69c19f7316 Change StackDirection from StackGrowsUp to StackGrowsDown. 
The following improvements are accomplished as a result of applying this patch:
- Fixed frame objects' offsets (relative to either the virtual frame pointer or
  the stack pointer) are set before instruction selection is completed. There is
  no need to wait until Prologue/Epilogue Insertion is run to set them.
- Calculation of final offsets of fixed frame objects is straightforward. It is
  no longer necessary to assign negative offsets to fixed objects for incoming
  arguments in order to distinguish them from the others.
- Since a fixed object has its relative offset set during instruction
  selection, there is no need to conservatively set its alignment to 4.
- It is no longer necessary to reorder non-fixed frame objects in 
  MipsFrameLowering::adjustMipsStackFrame.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131915 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-23 20:16:59 +00:00
Cameron Zwarich
d34d429401 Fix <rdar://problem/9476260> by having tail calls always generate 32-bit branches 
in Darwin Thumb2 code. Tail calls are already disabled on Thumb1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131894 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-23 01:57:17 +00:00
Chris Lattner
92f920c109 add a missing alias to make us more bug compatible with gcc, PR9378 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131874 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-22 22:31:57 +00:00
Renato Golin
1ec11fb8b5 RTABI chapter 4.3.4 specifies __eabi_mem* calls. Specifically, __eabi_memset accepts parameters (ptr, size, value) in a different order than GNU's memset (ptr, value, size), therefore the special lowering in AAPCS mode. Implementation by Evzen Muller. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131868 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-22 21:41:23 +00:00
Chris Lattner
87943e3698 add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131863 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-22 18:28:46 +00:00
Johnny Chen
75f4296c7c Fix Bug 9386 - ARM disassembler failed to disassemble conditional bx 
Modified the patch to .td file supplied by Jyun-Yan You.  Add a test case and
modified ARMDisassemblerCore.cpp a little bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131859 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-22 17:51:04 +00:00
Chris Lattner
b6fcf4cfbc move PR9408 here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131841 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-22 05:45:06 +00:00
Chris Lattner
40f5fbcc5c add a copy ctor to TargetLibraryInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131806 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 20:09:13 +00:00
Benjamin Kramer
b22da2a72c X86: smulo -> add is now done target-independently in DAGCombiner, remove the patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131801 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 18:32:01 +00:00
Cameron Zwarich
37fed38ec1 Fix PR9978 by adding RIP to GR64_TC so it can be used as an address in PIC code. It 
is already in GR64 for the same reasons. Since it isn't allocatable it can't cause
any problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131787 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 04:13:49 +00:00
Akira Hatanaka
52106e1e25 Use the correct register to access stack frame objects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131785 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 03:01:03 +00:00
Akira Hatanaka
f346c69530 Insert instructions that copy $sp to or from $fp at the right locations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131784 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 02:29:26 +00:00
Akira Hatanaka
43299776d7 Change the order fixed objects are created in MipsTargetLowering::LowerCall in 
preparation for reversing StackDirection.

Fixed objects are created in the following order:  
 1. Incoming arguments passed on stack.
 2. va_arg objects (include both arguments that are passed in registers and
    pointer to the location of the first va_arg argument).
 3. $gp restore slot.
 4. Outgoing arguments passed on stack.
 5. Pointer to alloca'd space.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131767 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 23:22:14 +00:00
Eli Friedman
c088345f13 Add fast-isel support for byval calls on x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131764 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 22:21:04 +00:00
Akira Hatanaka
d37776d1c1 In CC_MipsO32, allocate a stack space regardless of whether the argument is 
passed in register or on the stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131758 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 21:39:54 +00:00
Akira Hatanaka
6ffbf82e22 Define functions that get/set maximum call frame size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131752 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 20:11:17 +00:00
Rafael Espindola
b8adb8af0f adds some attributes to attribute section when cpu is "xscale" 
(this is what used in Android NDK, when architecture is ARMv5)

patch by Koan-Sin Tan

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131751 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 20:10:34 +00:00
Rafael Espindola
298c8e12ea fixes target address tBL and tBLX and sets relocation type 
of tBL/tBLX to R_ARM_THM_CALL (ARM ELF 4.7.1.6)

Patch by koan-sin tan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131748 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 20:01:01 +00:00
Stuart Hastings
0e29ed081b Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends. 
rdar://problem/8614450


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131746 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 19:04:40 +00:00