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48296 Commits

Author SHA1 Message Date
Andrew Trick
cc359d9fa2 indvars -disable-iv-rewrite: insert new trunc instructions carefully. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134112 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 23:03:57 +00:00
Cameron Zwarich
faff127319 In the ARM global merging pass, allow extraneous alignment specifiers. This pass 
already makes the assumption, which is correct on ARM, that a type's alignment is
less than its alloc size. This improves codegen with Clang (which inserts a lot of
extraneous alignment specifiers) and fixes <rdar://problem/9695089>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134106 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 22:24:25 +00:00
Eric Christopher
fa6f5917af Remove getRegClassForInlineAsmConstraint from the ARM port. 
Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134095 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 21:10:36 +00:00
Eric Christopher
50cf9b38dc Remove todo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134094 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 21:05:54 +00:00
Rafael Espindola
00258d17cd make compose and isMoveInstr static functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134093 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 20:55:48 +00:00
Jim Grosbach
74472b4bf9 Refactor away tSpill and tRestore pseudos in ARM backend. 
The tSpill and tRestore instructions are just copies of the tSTRspi and
tLDRspi instructions, respectively. Just use those directly instead.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134092 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 20:26:39 +00:00
Eric Christopher
1e965641dc Add a TODO for the Alpha port inline asm constraints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134089 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 19:41:27 +00:00
Eric Christopher
46b65f7a2b Move Alpha from getRegClassForInlineAsmConstraint to 
getRegForInlineAsmConstraint.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134088 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 19:40:01 +00:00
Eric Christopher
38d6426523 Update comment for getRegForInlineAsmConstraint for Mips. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134087 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 19:33:04 +00:00
Eric Christopher
1c24ba9fad Move the Blackfin port away from getRegClassForInlineAsmConstraint by 
creating a few specific register classes.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134086 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 19:30:29 +00:00
Eric Christopher
193f7e2eb0 Remove getRegClassForInlineAsmConstraint from MBlaze. Add a TODO comment 
for the port.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134085 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 19:12:24 +00:00
Eric Christopher
314aff1474 Remove getRegClassForInlineAsmConstraint for Mips. 
Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134084 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 19:04:31 +00:00
Eric Christopher
158bf50787 Remove getRegClassForInlineAsmConstraint from sparc. 
Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134083 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 18:53:10 +00:00
Eric Christopher
ca42299619 Move XCore from getRegClassForInlineAsmConstraint to 
getRegForInlineAsmConstraint.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134080 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 17:53:29 +00:00
Eric Christopher
d176af8cf3 Use getRegForInlineAsmConstraint instead of custom defining regclasses 
via vectors.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134079 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 17:23:50 +00:00
Chad Rosier
ce77aa3edc Temporarily revert r134057: "Let simplify cfg simplify bb with only debug and 
lifetime intrinsics" due to buildbot failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134071 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 16:22:11 +00:00
Jim Grosbach
254cf03a45 Asm parser range checking on .<size> <value> directives. 
For example, ".byte 256" would previously assert() when emitting an object
file. Now it generates a diagnostic that the literal value is out of range.

rdar://9686950


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134069 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 16:05:14 +00:00
Benjamin Kramer
bdd1ef2dbe Revert a part of r126557 which could create unschedulable DAGs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134067 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 13:47:25 +00:00
Rafael Espindola
0fb7dcd48f Let simplify cfg simplify bb with only debug and lifetime intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134057 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 05:25:47 +00:00
NAKAMURA Takumi
c4a84304a0 Fix CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134055 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 03:26:17 +00:00
Andrew Trick
11745d4c02 indvars -disable-iv-rewrite: just because SCEV ignores casts doesn't 
mean they can be removed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134054 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 03:13:40 +00:00
Jakob Stoklund Olesen
2c0cbce763 Revert r134047 while investigating a llvm-gcc-i386-linux-selfhost 
miscompile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134053 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 02:03:36 +00:00
Evan Cheng
ab8be96fd3 Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134049 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 01:14:12 +00:00
Jakob Stoklund Olesen
4d517e34e5 Rewrite RAGreedy::splitAroundRegion, now with cool ASCII art. 
This function has to deal with a lot of special cases, and the old
version got it wrong sometimes. In particular, it would sometimes leave
multiple uses in the stack interval in a single block. That causes bad
code with multiple reloads in the same basic block.

The new version handles block entry and exit in a single pass. It first
eliminates all the easy cases, and then goes on to create a local
interval for the blocks with difficult interference. Previously, we
would only create the local interval for completely isolated blocks.

It can happen that the stack interval becomes completely empty because
we could allocate a register in all edge bundles, and the new local
intervals deal with the interference. The empty stack interval is
harmless, but we need to remove a SplitKit assertion that checks for
empty intervals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134047 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 00:24:24 +00:00
Evan Cheng
d5b03f252c Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 21:14:33 +00:00
Evan Cheng
6844f7bcde Hide more details in tablegen generated MCRegisterInfo ctor function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134027 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 20:44:22 +00:00
Evan Cheng
94b01f6882 Add MCInstrInfo registeration machinery. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134026 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 20:29:03 +00:00
Evan Cheng
22fee2dff4 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 20:07:07 +00:00
Evan Cheng
e837dead3c - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and 
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 19:10:37 +00:00
Jakob Stoklund Olesen
9bbe4d6c00 Clean up the handling of the x87 fp stack to make it more robust. 
Drop the FpMov instructions, use plain COPY instead.

Drop the FpSET/GET instruction for accessing fixed stack positions.
Instead use normal COPY to/from ST registers around inline assembly, and
provide a single new FpPOP_RETVAL instruction that can access the return
value(s) from a call. This is still necessary since you cannot tell from
the CALL instruction alone if it returns anything on the FP stack. Teach
fast isel to use this.

This provides a much more robust way of handling fixed stack registers -
we can tolerate arbitrary FP stack instructions inserted around calls
and inline assembly. Live range splitting could sometimes break x87 code
by inserting spill code in unfortunate places.

As a bonus we handle floating point inline assembly correctly now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134018 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 18:32:28 +00:00
Chad Rosier
118c9a0c49 Remove warning: 'c0' may be used uninitialized in this function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134014 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 17:26:57 +00:00
Jakob Stoklund Olesen
27ce3b96e5 Print registers by name instead of by number. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134013 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 17:24:32 +00:00
Andrew Trick
99a92f67c7 cleanup: misleading comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134010 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 16:45:04 +00:00
Roman Divacky
bdb226ec83 Implement ISD::VAARG lowering on PPC32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134005 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 15:30:42 +00:00
Jay Foad
4f91054fe4 PR10210: New method ConstantArray::getAsCString(). Use it in LTO to 
avoid getting embedded trailing null bytes in std::strings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133999 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 08:24:19 +00:00
Andrew Trick
dc8e546048 Cleanup. Fix a stupid variable name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133995 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 05:41:52 +00:00
Andrew Trick
5e7645be4c SCEVExpander: give new insts a name that identifies the reponsible pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133992 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 05:07:32 +00:00
Andrew Trick
a5d950f673 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133991 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 05:04:16 +00:00
Nick Lewycky
89991d4413 Fix typo in comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133990 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 03:57:31 +00:00
Rafael Espindola
cee94d718b Fix cmake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133989 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 03:17:03 +00:00
Andrew Trick
56caa09808 indvars --disable-iv-rewrite: sever ties with IVUsers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133988 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 03:01:46 +00:00
Andrew Trick
15832f6177 indvars --disable-iv-rewrite: Defer evaluating s/zext until SCEV 
evaluates all other IV exprs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133982 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 02:49:20 +00:00
Chandler Carruth
0b3b58df1b Fix CMake build by removing this now dead file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133981 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 02:03:12 +00:00
Jakob Stoklund Olesen
1e0bd63477 Fix a bad iterator dereference that Evan uncovered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133978 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 01:18:58 +00:00
Jim Grosbach
adf7366771 ARM Thumb2 asm syntax optional destination operand for binary operators. 
When the destination operand is the same as the first source register
operand for arithmetic instructions, the destination operand may be omitted.

For example, the following two instructions are equivalent:
and r1, #ff
and r1, r1, #ff

rdar://9672867



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133973 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 00:19:13 +00:00
Evan Cheng
f46e7e3d7f Remove RegClass2VRegMap from MachineRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133967 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 23:54:40 +00:00
Jim Grosbach
6b8f1e35ea ARM Assembly support for Thumb mov-immediate. 
Correctly parse the forms of the Thumb mov-immediate instruction:
  1. 8-bit immediate 0-255.
  2. 12-bit shifted-immediate.

The 16-bit immediate "movw" form is also legal with just a "mov" mnemonic,
but is not yet supported. More parser logic necessary there due to fixups.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133966 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 23:54:06 +00:00
Evan Cheng
f10711fb8c Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc can split live ranges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133962 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 23:40:45 +00:00
Andrew Trick
156d460c75 indvars -disable-iv-rewrite: run RLEV after SimplifyIVUsers for 
a bit more control over the order SCEVs are evaluated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133959 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 23:17:44 +00:00
Devang Patel
016c5829a5 During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133953 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 22:32:04 +00:00