Commit Graph

91645 Commits

Author SHA1 Message Date
Eli Bendersky
03494e05e8 Use dbgs() consistently for -debug printouts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179894 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 21:37:07 +00:00
Rafael Espindola
7a7e83ae59 Remove COFFYAML::Relocation.
Use MappingNormalization to read a COFF::relocation directly.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179891 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 21:28:07 +00:00
Bill Wendling
9c32678668 Try explicitly setting the target triple to see if this gets it to pass on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179890 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 21:24:51 +00:00
Anton Korobeynikov
8caffc1e75 Do not mangle in MS-way the globals with magic \001 in the name.
Based on the patch by David Nadlinger!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179889 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 21:20:56 +00:00
Bill Wendling
a317eb8229 Make test slightly more readable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179888 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 21:14:59 +00:00
Bill Wendling
bb418038e1 Add a testcase to make sure we generate the proper compact unwind section for a function that cannot produce a compact unwind encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179887 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 21:07:11 +00:00
Arnold Schwaighofer
d717e202a2 LoopVectorizer: Use matcher from PatternMatch.h for the min/max patterns
Also make some static function class functions to avoid having to mention the
class namespace for enums all the time.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 21:03:36 +00:00
Eric Christopher
09b7981803 80-col fixup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179881 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 20:37:12 +00:00
Eric Christopher
32dc092351 Reformat and nuke trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179880 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 20:37:09 +00:00
Adrian Prantl
2f445be5a7 Rename ClassType to the more accurate UnderlyingType and document its purpose.
rdar://problem/13463793

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179877 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 19:56:02 +00:00
Chad Rosier
4acef770cf [ms-inline asm] Make code layout more canonical with iniline asm handled last.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179875 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 19:29:50 +00:00
Chad Rosier
76bb21bed8 Attempt to pacify this test for the buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179874 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 19:27:33 +00:00
Akira Hatanaka
f530aff9de [mips] First patch which adds support for micromips.
This patch adds support for recoded (meaning assembly-language compatible to
standard mips32) arithmetic 32-bit instructions.

Patch by Zoran Jovanovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179873 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 19:03:11 +00:00
Akira Hatanaka
8d99ec5748 [mips] Fix InstAlias of XOR and OR macros. Set EmitAlias flag and change
operand type to uimm16.

Patch by Vladimir Medic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179872 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 18:47:40 +00:00
Chad Rosier
e43624e345 [ms-inline asm] Refactor the parsing of identifiers. No functional change
indended.
Part of rdar://13663589

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179871 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 18:39:50 +00:00
Bill Wendling
f341dacb23 Add test to make sure that a int-to-ptr can be merged correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179869 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 18:16:06 +00:00
Chad Rosier
d386843661 [ms-inline asm] Remove these asserts. C++ variables that use namespace
qualifiers don't necessarily begin with an identifier (e.g., ::foo::bar).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179867 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 17:37:05 +00:00
Chad Rosier
3031ac0131 [ms-inline asm] Move this variable into the scope in which it is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179866 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 17:32:29 +00:00
Chad Rosier
fea1f8ee7a [ms-inline asm] Make this a hard error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179865 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 17:31:39 +00:00
Benjamin Kramer
eb733d2a1b ConstantFolding: ComputeMaskedBits wants the scalar size for vectors.
Fixes PR15791.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179859 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 16:56:24 +00:00
Chad Rosier
89ab4e4cd0 [ms-inline asm] Cleanup the dot operator implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179856 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 15:57:00 +00:00
Tim Northover
d3af696c08 ARM: Permit "sp" in ARM variant of STREXD instructions
Patch from Mihail Popa

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179854 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 15:44:32 +00:00
Rafael Espindola
143d223447 refactor the struct byte swapping to a helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179851 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 13:45:05 +00:00
Rafael Espindola
baecbb82d8 Only run the tests in test/Object/ARM if we have ARM support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179850 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 12:47:53 +00:00
Benjamin Kramer
e94e4ca5fd Attributes: Don't print trailing whitespace on the function attribute comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179849 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 11:43:21 +00:00
Rafael Espindola
db5f927020 Don't read one command past the end.
Thanks to Evgeniy Stepanov for reporting this.

It might be a good idea to add a command iterator abstraction to MachO.h, but
this fixes the bug for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179848 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 11:36:47 +00:00
Tim Northover
4521019c6f ARM: permit "sp" in ARM variants of MOVW/MOVT instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179847 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 09:58:09 +00:00
Jakub Staszak
a7e3701658 Revert 179826. Tests were worthless.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179845 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 09:32:30 +00:00
Eric Christopher
41201ed06f Revert "PR14606: debug info imported_module support"
This reverts commit r179836 as it seems to have caused test failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179840 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 07:47:16 +00:00
David Blaikie
bcb81360a2 PR14606: debug info imported_module support
Adding another CU-wide list, in this case of imported_modules (since they
should be relatively rare, it seemed better to add a list where each element
had a "context" value, rather than add a (usually empty) list to every scope).
This takes care of DW_TAG_imported_module, but to fully address PR14606 we'll
need to expand this to cover DW_TAG_imported_declaration too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179836 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 06:57:04 +00:00
Lang Hames
64362272b6 Add support for index resources (for a SlotIndex) to be relinquished.
When the SlotIndexes pass was introduced it was intended to support insertion
of code during register allocation. Removal of code was a minor consideration
(and raised the question of what to do about dangling SlotIndex objects pointing
to the erased index), so I opted to keep all indexes around indefinitely and
simply null out those that weren't being used.

Nowadays people are moving more code around (e.g. via HandleMove), which means
more zombie indexes. I want to start killing off indexes when we're done with
them to reclaim the resources they use up.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179834 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 04:31:49 +00:00
Michael Liao
0ee17006b1 Use 'array_lengthof' as possible to avoid magic numbers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179833 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 04:03:37 +00:00
Tom Stellard
48b809e6e5 R600: Add pattern for the BFI_INT instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179830 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 02:11:06 +00:00
Tom Stellard
ae2a8929d8 R600/SI: Use InstFlag for VOP3 modifier operands
InstFlag has a default value of 0 and will simplify the VOP3 patterns.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179829 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 02:11:00 +00:00
Tom Stellard
3abd23bac5 R600: Reorganize lit tests and document how they should be organized
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179828 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 02:10:53 +00:00
Jakub Staszak
9affd16361 Keep coding stanard. Don't use "else if" after "return".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179826 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 01:18:04 +00:00
Jakub Staszak
943baedefd Don't run expensive -O2 and -O3 in tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179825 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 01:10:45 +00:00
Eli Bendersky
5bd0767a04 Add some more stats for fast isel vs. SelectionDAG, w.r.t lowering function
arguments in entry BBs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179824 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 01:04:40 +00:00
Bill Wendling
89ec1c5c9c Use an enum instead of magic constants to improve readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179820 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 00:05:59 +00:00
Bill Wendling
74d892433d Implement a better fix for PR15185.
If the return type is a pointer and the call returns an integer, then do the
inttoptr convertions. And vice versa.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179817 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 23:34:17 +00:00
Bill Wendling
fa2b25c573 Relax this assert. It may not hold in all cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179814 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 23:16:46 +00:00
Chad Rosier
3f1f9c3798 [ms-inline asm] Apply the condition code mnemonic aliases to both the Intel and
AT&T dialect.  Test case for r179804 as well.
rdar://13674398 and PR13340.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179813 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 23:16:12 +00:00
Bill Wendling
18014d4e4c Assert if we're trying to generate a null compact unwind entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179809 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 22:56:05 +00:00
Bill Wendling
2828608e8e Set the compact unwind encoding to 'requires EH DWARF' if we cannot generate a CU encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179808 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 22:55:29 +00:00
Hal Finkel
4029c3feed Disable PPC comparison optimization by default
This seems to cause a stage-2 LLVM compile failure (by crashing TableGen); do
I'm disabling this for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179807 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 22:54:25 +00:00
Chad Rosier
88eb89b89f [asm parser] Add support for predicating MnemonicAlias based on the assembler
variant/dialect.  Addresses a FIXME in the emitMnemonicAliases function.
Use and test case to come shortly.
rdar://13688439 and part of PR13340.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179804 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 22:35:36 +00:00
Hal Finkel
860c08cad5 Implement optimizeCompareInstr for PPC
Many PPC instructions have a so-called 'record form' which stores to a specific
condition register the result of comparing the result of the instruction with
zero (always as a signed comparison). For integer operations on PPC64, this is
always a 64-bit comparison.

This implementation is derived from the implementation in the ARM backend;
there are some differences because PPC condition registers are allocatable
virtual registers (although the record forms always use a specific one), and we
look for a matching subtraction instruction after the compare (but before the
first use) in addition to before it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179802 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 22:15:08 +00:00
Bill Wendling
a88a016f2d Make the TargetIndependent flag have the right boolean value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179798 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 21:45:04 +00:00
Benjamin Kramer
fcba22decb X86: Add an SSE2 lowering for 64 bit compares when pcmpgtq (SSE4.2) isn't available.
This pattern started popping up in vectorized min/max reductions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179797 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 21:37:45 +00:00
Eli Bendersky
8bb3b098b9 Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179793 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 20:49:17 +00:00