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266 Commits

Author SHA1 Message Date
Chris Lattner
7da5313d3f eliminate a copy of the machineoperand printing stuff. Keep the copy that 
knows how to print offsets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45457 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-30 21:03:30 +00:00
Chris Lattner
fde5f801be Simplify and clean up some machine operand/instr printing/dumping stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45456 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-30 21:01:27 +00:00
Chris Lattner
0974d9a524 two register machineoperands are not identical unless their subregs match. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45455 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-30 20:55:08 +00:00
Chris Lattner
9e3304900f MachineOperand::getImmedValue -> MachineOperand::getImm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45454 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-30 20:50:28 +00:00
Chris Lattner
e12d6abfdf make machine operands fatter: give each one an up-pointer to the 
machineinstr that owns it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45449 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-30 06:11:04 +00:00
Chris Lattner
8019f41c0b Start using the simplified methods for adding operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45432 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-30 00:41:17 +00:00
Chris Lattner
a4161ee994 simplify some code by factoring operand construction better. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45428 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-30 00:12:25 +00:00
Chris Lattner
4ee451de36 Remove attribution from file headers, per discussion on llvmdev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-29 20:36:04 +00:00
Evan Cheng
c498b0281f Clean up sub-register implementation by moving subReg information back to 
MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44104 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-14 07:59:08 +00:00
Evan Cheng
fa9457276a Optionally create a MachineInstr without default implicit operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42945 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-13 02:23:01 +00:00
Evan Cheng
32dfbeada7 EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like 
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 08:50:34 +00:00
Dan Gohman
92dfe2001e Remove isReg, isImm, and isMBB, and change all their users to use 
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-14 20:33:02 +00:00
Dan Gohman
cb648f90a2 Remove spurious consts. This fixes warnings with compilers that 
are strict about such things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41956 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-14 20:08:19 +00:00
Christopher Lamb
6f95014158 Remove subreg index from MachineInstr's and also keep vregs as unsigned when adding operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40514 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 07:00:46 +00:00
Evan Cheng
bf9d02eaf6 MachineInstr::isPredicable() is no longer needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37599 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-15 19:06:07 +00:00
Evan Cheng
f277ee4be7 Add missing const qualifiers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37341 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-29 18:35:22 +00:00
Evan Cheng
c3a289c4b5 Rename M_PREDICATED to M_PREDICABLE; Moved isPredicable() to MachineInstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37121 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:56:08 +00:00
Evan Cheng
19e3f31f6a Added getNumExplicitOperands and findFirstPredOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37064 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:26:09 +00:00
Nate Begeman
7bf1c272ab llvm bug #1350, parts 1, 2, and 3. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36618 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-01 05:57:02 +00:00
Evan Cheng
faa510726f Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36483 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 19:00:32 +00:00
Evan Cheng
32eb1f1ca4 Change findRegisterUseOperand() to return operand index instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35363 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 22:37:45 +00:00
Evan Cheng
76d7e76c15 Use findRegisterUseOperand to find a kill of particular register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34512 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-23 01:04:26 +00:00
Evan Cheng
b371f457b0 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34428 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-19 21:49:54 +00:00
Reid Spencer
a284cbf667 For PR1207: 
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34399 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-19 03:20:00 +00:00
Evan Cheng
094e3e553f Added findRegisterDefOperand(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34380 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-17 11:10:18 +00:00
Evan Cheng
bdf44b929f Print <dead> def operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34343 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-16 09:49:18 +00:00
Jeff Cohen
4b607748d8 The best unbreakage yet, addressing Bill's concerns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32622 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-16 02:15:42 +00:00
Jeff Cohen
c21c5eeb4f An even better unbreakage... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32617 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-15 22:57:14 +00:00
Bill Wendling
e81561909d Changed llvm_ostream et all to OStream. llvm_cerr, llvm_cout, llvm_null, are 
now cerr, cout, and NullStream resp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32298 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 01:30:32 +00:00
Evan Cheng
576d123e13 Move copyKillDeadInfo out-of-line. Add findRegisterUseOperand(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32273 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-06 08:27:42 +00:00
Evan Cheng
67f660cb08 - MachineInstr now keeps a ptr to TargetInstrDescriptor instead of Opcode. 
- Remove the ugly TargetInstrDescriptors hack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32032 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-30 07:08:44 +00:00
Bill Wendling
a09362eb97 Use llvm streams instead of <iostream> 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31985 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-28 22:48:48 +00:00
Evan Cheng
8bcb042f22 Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31957 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-28 02:25:34 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Chris Lattner
a138c6c73a setOperand should not zap the operand list or add implicit operands to an 
instruction.  Doing so breaks the FP stackifier, the alpha branch selector
the sparc fpmover.

This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31876 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-20 17:57:22 +00:00
Evan Cheng
6b2c05f3d3 Minor updates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31761 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 20:54:29 +00:00
Evan Cheng
d7de496b23 - Let MachineInstr ctors add implicit def and use operands. Other operands 
will be inserted before these operands. If the opcode changes (by
  setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
  that move kill / dead info to MachineInstr's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31711 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-13 23:34:06 +00:00
Evan Cheng
3ba433a7e8 Add methods to add implicit def use operands to a MI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31675 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 10:20:02 +00:00
Evan Cheng
438f7bc67c Add implicit def / use operands to MachineInstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 08:43:01 +00:00
Chris Lattner
13a04125df be more aggressive about matching identical instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31179 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-25 18:08:14 +00:00
Chris Lattner
8ace2cd034 implement MachineOperand::isIdenticalTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31088 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-20 22:39:59 +00:00
Chris Lattner
d8f44e07b8 Only call isUse/isDef on register operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30118 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 20:19:27 +00:00
Evan Cheng
8d3af5e7d0 Instructions with variable operands (variable_ops) can have a number required 
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28791 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 07:22:16 +00:00
Evan Cheng
00aff7d977 Remove a bogus cast. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28492 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 08:00:14 +00:00
Chris Lattner
6e994b7492 Final pass of minor cleanups for MachineInstr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28110 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 19:36:09 +00:00
Chris Lattner
943b5e117f Remove redundancy and a level of indirection when creating machine operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28107 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 19:14:44 +00:00
Chris Lattner
8b915b4ed2 Remove and simplify some more machineinstr/machineoperand stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 18:16:01 +00:00
Chris Lattner
2d90ac7ca6 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 18:05:43 +00:00
Chris Lattner
e53f4a055f Move some methods out of MachineInstr into MachineOperand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 17:52:23 +00:00
Chris Lattner
63b3d7113d There shalt be only one "immediate" operand type! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 17:21:20 +00:00