Commit Graph

591 Commits

Author SHA1 Message Date
08addbd477 Fix a crash viewing dags that have target nodes in them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23300 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-09 22:35:03 +00:00
39ee1ac7e5 Last round of 2-node folds from SD.cpp. Will move on to 3 node ops such
as setcc and select next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23295 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-09 19:49:52 +00:00
223df2269d Move yet more folds over to the dag combiner from sd.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23278 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-08 20:18:10 +00:00
9980119270 Another round of dag combiner changes. This fixes some missing XOR folds
as well as fixing how we replace old values with new values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23260 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-07 23:25:52 +00:00
1e111c7bbb Fix a bug nate ran into with replacealluseswith. In the recursive cse case,
we were losing a node, causing an assertion to fail.  Now we eagerly delete
discovered CSE's, and provide an optional vector to keep track of these
discovered equivalences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23255 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-07 05:37:01 +00:00
6a8a21ced4 Fix a checking failure in gs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23235 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-03 01:04:40 +00:00
70b9b1098a Make sure to auto-cse nullary ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23224 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 19:36:17 +00:00
6621e3b963 Fix some buggy logic where we would try to remove nodes with two operands
from the binary ops map, even if they had multiple results.  This latent bug
caused a few failures with the dag isel last night.

To prevent stuff like this from happening in the future, add some really
strict checking to make sure that the CSE maps always match up with reality!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23221 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 19:15:44 +00:00
4ed11b4b79 Add support for ANY_EXTEND and add a few minor folds for it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23203 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 00:17:32 +00:00
39f60a2302 Fix some code in the current node combining code, spotted when it was moved
over to DAGCombiner.cpp

1. Don't assume that SetCC returns i1 when folding (xor (setcc) constant)
2. Don't duplicate code in folding AND with AssertZext that is handled by
   MaskedValueIsZero


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23196 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-01 23:25:49 +00:00
7383ce4127 Fix VC++ precedence warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23169 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-31 02:47:06 +00:00
fe75a2836a Sigh, not my day. Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23166 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-31 00:43:49 +00:00
9f52f2838d Fix a mistake in my previous patch pointed out by sabre; the AssertZext
case in MaskedValueIsZero was wrong.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23165 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-31 00:43:08 +00:00
b85dfab889 Remove some unnecessary casts, and add the AssertZext case to
MaskedValueIsZero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23164 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-31 00:27:53 +00:00
0fdd768094 Allow physregs to occur in the dag with multiple types. Though I don't likethis, it is a requirement on PPC, which can have an f32 value in r3 at onepoint in a function and a f64 value in r3 at another point. :(
This fixes compilation of mesa


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23161 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-30 22:38:38 +00:00
5ffcd9b56c Remove a bogus piece of my AssertSext/AssertZext patch. oops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23148 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-30 02:54:28 +00:00
56eb86806d Add support for AssertSext and AssertZext, folding other extensions with
them.  This allows for elminination of redundant extends in the entry
blocks of functions on PowerPC.

Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs
to ISD::MUL in ExpandOp are actually just extended i32 values and not real
i64 values.  this allows us to codegen

int mulhs(int a, int b) { return ((long long)a * b) >> 32; }
as:
_mulhs:
        mulhw r3, r4, r3
        blr

instead of:
_mulhs:
        mulhwu r2, r4, r3
        srawi r5, r3, 31
        mullw r5, r4, r5
        add r2, r2, r5
        srawi r4, r4, 31
        mullw r3, r4, r3
        add r3, r2, r3
        blr

with a similar improvement on x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23147 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-30 02:44:00 +00:00
c26aefa15a Add a new API for Nate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23131 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-29 21:59:31 +00:00
ff01698ec0 Fix a bug in ReplaceAllUsesWith
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23122 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-28 23:59:36 +00:00
579cfabdad Checking types here is not safe, because multiple types can map to the same
register class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23103 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 21:39:15 +00:00
8b52f21f10 Revampt ReplaceAllUsesWith to be more efficient and easier to use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23087 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 18:36:28 +00:00
5839bf2b3b Change ConstantPoolSDNode to actually hold the Constant itself instead of
putting it into the constant pool.  This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23081 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 17:15:30 +00:00
2bb06cdf27 Fix a huge annoyance: SelectNodeTo took types before the opcode unlike
every other SD API.  Fix it to take the opcode before the types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23079 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 16:36:26 +00:00
f07d023dd9 Fix a nasty bug from a previous patch of mine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23069 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 00:13:12 +00:00
1999b4b974 New fold for SELECT_CC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23058 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-25 20:04:38 +00:00
43247a157b Don't auto-cse nodes that return flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23055 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-25 19:12:10 +00:00
9d338cf3a3 simplify the code a bit using isOperationLegal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23053 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-25 17:54:58 +00:00
4025a9c2cc ADd support for TargetConstantPool nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23041 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-25 05:03:06 +00:00
afb2dd43de add a new TargetFrameIndex node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23035 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-25 00:43:01 +00:00
7651fa4a7e add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23027 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-24 23:00:29 +00:00
7b2880c4cd Add ReplaceAllUsesWith that can take a vector of replacement values.
Add some foldings to hopefully help the illegal setcc issue, and move some code around.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23025 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-24 22:44:39 +00:00
1d6373c1af teach selection dag mask tracking about the fact that select_cc operates like
select.  Also teach it that the bit count instructions can only set the low bits
of the result, depending on the size of the input.

This allows us to compile this:

int %eq0(int %a) {
        %tmp.1 = seteq int %a, 0                ; <bool> [#uses=1]
        %tmp.2 = cast bool %tmp.1 to int                ; <int> [#uses=1]
        ret int %tmp.2
}

To this:

_eq0:
        cntlzw r2, r3
        srwi r3, r2, 5
        blr

instead of this:

_eq0:
        cntlzw r2, r3
        rlwinm r3, r2, 27, 31, 31
        blr

when setcc is marked illegal on ppc (which restores parity to non-illegal
setcc).  Thanks to Nate for pointing this out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23013 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-24 16:46:55 +00:00
cebd433d8d Teach SelectionDAG how to simplify a few more setcc-equivalent select_cc
nodes so that backends don't have to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22999 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-24 04:57:57 +00:00
0750a40a4f Fix optimization of select_cc seteq X, 0, 1, 0 -> srl (ctlz X), log2 X size
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22995 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-24 00:21:28 +00:00
7042f15bde Teach the SelectionDAG how to transform select_cc eq, X, 0, 1, 0 into
either seteq X, 0 or srl (ctlz X), size(X-1), depending on what's legal
for the target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22978 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 05:41:12 +00:00
c975e1dedc add anew method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22957 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 22:30:30 +00:00
99baddaf57 add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22955 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 19:48:59 +00:00
6b09a29604 add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22949 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 18:49:33 +00:00
aaaa0b67dd Add support for TargetGlobalAddress nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22938 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 22:31:04 +00:00
fa164b61d1 Fix a bug in previous commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22936 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 21:34:13 +00:00
7228aa7868 Print physreg register nodes with target names (e.g. F1) instead of numbers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22934 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 21:21:16 +00:00
a92b7c36e9 Fix VC++ precedence warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22902 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 04:39:48 +00:00
294a0a103d Add support for target DAG nodes that take 4 operands, such as PowerPC's
rlwinm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22856 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 07:30:15 +00:00
a23e8154dc Fix printing of VTSDNodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22853 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 03:31:02 +00:00
58b968be85 Move the code dependency for MathExtras.h from SelectionDAGNodes.h.
Added some class dividers in SelectionDAG.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22841 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 20:08:02 +00:00
cb6682fa44 Culling out use of unions for converting FP to bits and vice versa.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22838 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 19:34:49 +00:00
8b8749f367 Fix a bug in RemoveDeadNodes where it would crash when its "optional"
argument is not specified.

Implement ReplaceAllUsesWith.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22834 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 19:00:20 +00:00
37bfbb47de add a new TargetConstant node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22813 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 00:34:06 +00:00
d5d0f9bd20 Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef)
used to tack a register number onto the node.

Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number.  These three operations just become normal
DAG nodes now, instead of requiring special handling.

Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes.  The legalizer will not touch them, and this
is bad, so don't do it. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22806 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 21:55:35 +00:00
7cbd525ba8 Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
fixme from the PowerPC backend.  Emit slightly better code for legalizing
select_cc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 19:49:35 +00:00