6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-10-30 16:17:05 +00:00
Code Issues Projects Releases Wiki Activity
73,603 Commits 39 Branches 0 Tags
dedd6ee135f886e219035b2cf5957ce492f90ed1
Commit Graph

3570 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
d519de0827 Include a source location when complaining about bad inline assembly. 
Add a MI->emitError() method that the backend can use to report errors
related to inline assembly. Call it from X86FloatingPoint.cpp when the
constraints are wrong.

This enables proper clang diagnostics from the backend:

$ clang -c pr30848.c
pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack
  __asm__ ("" : "=u" (d));  /* { dg-error "output regs" } */
           ^
1 error generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134307 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 03:53:34 +00:00
Rafael Espindola
cfe5254cd3 Create a isFullCopy predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134189 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-30 21:15:52 +00:00
Devang Patel
272511f518 Revert r133953 for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134116 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 23:50:13 +00:00
Evan Cheng
e837dead3c - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and 
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 19:10:37 +00:00
Evan Cheng
f46e7e3d7f Remove RegClass2VRegMap from MachineRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133967 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 23:54:40 +00:00
Evan Cheng
f10711fb8c Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc can split live ranges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133962 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 23:40:45 +00:00
Devang Patel
016c5829a5 During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133953 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 22:32:04 +00:00
Rafael Espindola
5b220213bf There is only one register coalescer. Merge it into the base class and 
remove the analysis group.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133899 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-26 22:34:10 +00:00
Rafael Espindola
fdf16ca44f Move RegisterCoalescer.h to lib/CodeGen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133895 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-26 21:41:06 +00:00
Devang Patel
8594d429e0 Handle debug info for i128 constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133821 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-24 20:46:11 +00:00
Jay Foad
7d715dfe6d Fix a FIXME by making GlobalVariable::getInitializer() return a 
const Constant *.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133400 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-19 18:37:11 +00:00
Benjamin Kramer
22a54c1cd7 Don't allocate empty read-only SmallVectors during SelectionDAG deallocation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133348 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 13:13:44 +00:00
Eric Christopher
362fee90b9 Lower multiply with overflow checking to __mulo<mode> 
calls if we haven't been able to lower them any
other way.

Fixes rdar://9090077 and rdar://9210061


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133288 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 20:41:29 +00:00
Lang Hames
8d857660ce Add a hook for PBQP clients to run a custom pre-alloc pass to run prior to PBQP allocation. Patch by Arnaud Allard de Grandmaison. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133249 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 07:09:01 +00:00
Jakub Staszak
7cc2b07437 Introduce MachineBranchProbabilityInfo class, which has similar API to 
BranchProbabilityInfo (expect setEdgeWeight which is not available here).
Branch Weights are kept in MachineBasicBlocks. To turn off this analysis
set -use-mbpi=false.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133184 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-16 20:22:37 +00:00
Owen Anderson
23b0766b47 Fix formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133164 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-16 16:52:24 +00:00
Owen Anderson
77b4b13c2a Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133106 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-15 23:35:18 +00:00
Andrew Trick
4cb971ce1c Added -stress-sched flag in the Asserts build. 
Added a test case for handling physreg aliases during pre-RA-sched.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133063 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-15 17:16:12 +00:00
Bruno Cardoso Lopes
9a767330f5 Add one more argument to the prefetch intrinsic to indicate whether it's a data 
or instruction cache access. Update the targets to match it and also teach
autoupgrade.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132976 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-14 04:58:37 +00:00
Bill Wendling
3bdc190d33 Reformatting. Moving class definitions to more natural places. No functionalogical changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132876 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-11 11:37:49 +00:00
Cameron Zwarich
a86686e643 Provide an ARMCCState subclass of CCState so that ARM clients will always set 
CallOrPrologue correctly and eliminate the existing setter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132856 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-10 20:59:24 +00:00
Cameron Zwarich
a50760f43b Rename the ParmContext enum values to make a bit more sense and add a small 
comment on their meaning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132854 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-10 20:37:36 +00:00
Cameron Zwarich
a0f803a2e3 Remove tabs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132853 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-10 20:31:39 +00:00
Eric Christopher
471e422480 Add a parameter to CCState so that it can access the MachineFunction. 
No functional change.

Part of PR6965


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132763 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-08 23:55:35 +00:00
Lang Hames
d0685b0e28 Switched to DenseMap for allowed sets in PBQP. Reduces total LLC time by 15% on CINT2006 for x86-32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132707 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-07 06:05:58 +00:00
Devang Patel
ee1f87881b Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132488 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-02 21:31:00 +00:00
Chad Rosier
11772e093f Typos. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132437 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-01 23:32:40 +00:00
Charles Davis
f46337004a When generating code for Win64 EH, emit StartProc and EndProc directives. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132250 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-28 04:21:04 +00:00
Rafael Espindola
5b23b7fe31 Make size computation less brittle. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132222 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 22:05:41 +00:00
Charles Davis
88c816453f Add the suffix to the Win64 EH data sections' names if given. Add a test for 
this. XFAIL'd, because the COFF AsmParser can't handle .section yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132220 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 21:38:47 +00:00
Charles Davis
7b06b7357a Add a parameter to the Win64 EH section getters to get a section with a 
suffix (e.g. .xdata$myfunc). The suffix part isn't implemented yet, but
I'll get to it in the next patch.

Fix up all callers of the affected functions. Make them pass said suffix to
the function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132205 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 19:09:24 +00:00
Eric Christopher
0958870a08 Comment cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132162 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-26 22:54:27 +00:00
Devang Patel
8ec0c1c07b Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131974 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 18:27:52 +00:00
Charles Davis
f3ffc2cd76 Add .pdata and .xdata sections to the COFF TLOF implementation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131763 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 22:13:55 +00:00
Jim Grosbach
7fcbfe38d2 Frame indices are signed. Update MachineOperand methods accordingly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131475 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 18:29:21 +00:00
Jakob Stoklund Olesen
f5497fb1b4 Teach LiveInterval::isZeroLength about null SlotIndexes. 
When instructions are deleted, they leave tombstone SlotIndex entries.
The isZeroLength method should ignore these null indexes.

This causes RABasic to sometimes spill a callee-saved register in the
abi-isel.ll test, so don't run that test with -regalloc=basic.  Prioritizing
register allocation according to spill weight can cause more registers to be
used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131436 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 23:50:05 +00:00
Dan Gohman
975716af1b Delete unused variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131430 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 22:19:54 +00:00
Eli Friedman
482feb33b2 Make fast-isel work correctly s/uadd.with.overflow intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131420 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 21:06:17 +00:00
Eli Friedman
2586b8f936 Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131417 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 20:27:46 +00:00
Evan Cheng
cbc988be22 Re-commit 131172 with fix. MachineInstr identity checks should check dead 
markers. In some cases a register def is dead on one path, but not on
another.

This is passing Clang self-hosting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131214 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-12 00:56:58 +00:00
Bill Wendling
1cfac8c534 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131173 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-11 01:08:39 +00:00
Rafael Espindola
e29887b4ee Use .cfi_sections to put the unwind info in .debug_frame when possible. With 
this clang will use .debug_frame in, for example,
clang -g -c -m32 test.c
This matches gcc's behaviour. It looks like .debug_frame is a bit bigger
than .eh_frame, but has the big advantage of not being allocated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131140 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-10 18:39:09 +00:00
Rafael Espindola
0125d50569 Yet more dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130988 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-06 15:31:55 +00:00
Rafael Espindola
ffa6408f9c Update comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130987 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-06 15:28:56 +00:00
Rafael Espindola
ba39f88d0e More dead code elimination. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130985 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-06 15:22:26 +00:00
Owen Anderson
d71867a8f4 Allow FastISel of three-register-operand instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130934 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-05 17:59:04 +00:00
Chandler Carruth
79142427a0 Remove an unused variable in NDEBUG (found with -Wunused-variable). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130688 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 05:49:01 +00:00
Jakob Stoklund Olesen
8e33095cd4 Add a SlotIndexes::insertMachineInstrInMaps to insert the instruction after any null indexes. 
This makes a difference if a live interval is referring to a deleted
instruction. It can be important to insert an instruction before or after a
deleted instruction to avoid interference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130686 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 05:29:56 +00:00
Rafael Espindola
5426a9ee37 GCC uses a different encoding of pointers in the FDE when using 
-fno-dwarf2-cfi-asm. Implement the same behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130637 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-01 04:49:54 +00:00
Jakob Stoklund Olesen
6ee56e658a Avoid using stale entries form the sibling value map. 
This could happen when trying to use a value that had been eliminated after dead
code elimination and folding loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130597 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 06:42:21 +00:00