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359 Commits

Author SHA1 Message Date
Chad Rosier
6016a4a162 Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159839 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-06 17:44:22 +00:00
Chad Rosier
fd065bbed1 [fast-isel] Tell fast-isel to do nothing with the new donothing intrinsic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159837 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-06 17:33:39 +00:00
Bill Wendling
0bcbd1df7a Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and 
include/llvm/Analysis/DebugInfo.h to include/llvm/DebugInfo.h.

The reasoning is because the DebugInfo module is simply an interface to the
debug info MDNodes and has nothing to do with analysis.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159312 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-28 00:05:13 +00:00
Manman Ren
68f25571e7 ARM: properly handle alignment for struct byval. 
Factor out the expansion code into a function.
This change is to be enabled in clang.

rdar://9877866


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157830 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 19:33:18 +00:00
Jakob Stoklund Olesen
ee0d5d4398 Properly constrain register classes for sub-registers. 
Not all GR64 registers have sub_8bit sub-registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157150 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-20 06:38:37 +00:00
Chad Rosier
aefd36bdda Revert 156658. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156662 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-11 23:21:01 +00:00
Chad Rosier
550a08a876 [fast-isel] Fast-isel doesn't use the expect intrinsic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156658 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-11 23:10:58 +00:00
Eric Christopher
18112d83e7 To ensure that we have more accurate line information for a block 
don't elide the branch instruction if it's the only one in the block,
otherwise it's ok.

PR9796 and rdar://11215207

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154417 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 18:18:10 +00:00
Bill Wendling
84364a4e23 If we have a VLA that has a "use" in a metadata node that's then used 
here but it has no other uses, then we have a problem. E.g.,

  int foo (const int *x) {
    char a[*x];
    return 0;
  }

If we assign 'a' a vreg and fast isel later on has to use the selection
DAG isel, it will want to copy the value to the vreg. However, there are
no uses, which goes counter to what selection DAG isel expects.
<rdar://problem/11134152>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153705 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-30 00:02:55 +00:00
Chad Rosier
544b9b426f [fast-isel] Fold "urem x, pow2" -> "and x, pow2-1". This should fix the 271% 
execution-time regression for nsieve-bits on the ARMv7 -O0 -g nightly tester.
This may also improve compile-time on architectures that would otherwise 
generate a libcall for urem (e.g., ARM) or fall back to the DAG selector.
rdar://10810716


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153230 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-22 00:21:17 +00:00
Eric Christopher
8c5293c955 Do everything up to generating code to try to get a register for 
a variable. The previous code would break the debug info changing
code invariant. This will regress debug info for arguments where
we elide the alloca created.

Fixes rdar://11066468

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153074 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-20 01:07:58 +00:00
Eric Christopher
c415af225d Untabify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153073 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-20 01:07:56 +00:00
Eric Christopher
4476bae1b4 Add another debugging statement here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153072 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-20 01:07:53 +00:00
Eric Christopher
4e27027562 Use lookUpRegForValue here instead of duplicating the code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153071 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-20 01:07:47 +00:00
Eric Christopher
ccaea7dc0b We actually handle AllocaInst via getRegForValue below just fine. 
Part of rdar://8905263

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152845 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-15 21:33:47 +00:00
Eric Christopher
bb54d21495 Add some debugging output into fast isel as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152844 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-15 21:33:44 +00:00
Michael J. Spencer
c9c137b463 Properly emit _fltused with FastISel. Refactor to share code with SDAG. 
Patch by Joe Groff!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151183 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-22 19:06:13 +00:00
Craig Topper
44d23825d6 Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151134 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-22 05:59:10 +00:00
Eric Christopher
9b5d6b860c Ignore the lifetime intrinsics in fast-isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150848 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-17 23:03:39 +00:00
Chad Rosier
2f2d1d7ec0 [fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149730 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-04 00:39:19 +00:00
Bill Wendling
efd564fbd6 Remove the now-dead llvm.eh.exception and llvm.eh.selector intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149331 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-31 01:58:48 +00:00
Chad Rosier
5bd83345c7 [fast-isel] Remove SelectInsertValue() as fast-isel wasn't designed to handle 
instructions that define aggregate types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146492 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-13 17:45:06 +00:00
Chad Rosier
4552d3e22a [fast-isel] SelectInsertValue seems to be causing miscompiles for ARM. Disable while I investigate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146331 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-10 21:27:40 +00:00
Chad Rosier
b435aa2c1d Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146327 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-10 19:48:51 +00:00
Chad Rosier
cd462d055f [fast-isel] Add support for selecting insertvalue. 
rdar://10530851

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146276 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 20:09:54 +00:00
Chad Rosier
ae6f2cb1fc If fast-isel fails, remove dead instructions generated during the failed 
attempt.  

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145425 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-29 19:40:47 +00:00
Chad Rosier
aa5656c6b9 80-column. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145267 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-28 19:59:09 +00:00
Chad Rosier
478b06c980 When fast iseling a GEP, accumulate the offset rather than emitting a series of 
ADDs.  MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs
being: (1) If we can't materialize the large constant then we'll cause fast-isel
to bail. (2) Too large of an offset can't be directly encoded in the ADD
resulting in a MOV+ADD.  Generally not a bad thing because otherwise we would
have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix
for that. (3) Conversely, too low of a threshold we'll miss opportunities to 
coalesce ADDs.
rdar://10412592



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144886 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-17 07:15:58 +00:00
Chad Rosier
053e69ad57 Add fast-isel stats to determine who's doing all the work, the 
target-independent selector or the target-specific selector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144833 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 21:05:28 +00:00
Chad Rosier
22b34cce4d GEPs with all zero indices are trivially coalesced by fast-isel. For example, 
%arrayidx135 = getelementptr inbounds [4 x [4 x [4 x [4 x i32]]]]* %M0, i32 0, i64 0
%arrayidx136 = getelementptr inbounds [4 x [4 x [4 x i32]]]* %arrayidx135, i32 0, i64 %idxprom134

Prior to this commit, the GEP instruction that defines %arrayidx136 thought that 
%arrayidx135 was a trivial kill.  The GEP that defines %arrayidx135 doesn't 
generate any code and thus %M0 gets folded into the second GEP.  Thus, we need
to look through GEPs with all zero indices.
rdar://10443319

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144730 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 23:34:05 +00:00
Dan Gohman
9e15d658c9 Fix a thinko that Nick noticed. The previous code actually worked as 
intended, but only by accident.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141779 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 15:56:56 +00:00
Devang Patel
9aee335c23 Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139330 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 22:59:09 +00:00
Ivan Krasin
74af88a666 FastISel: avoid function calls between the materialization of the constant and its use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137993 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 22:06:10 +00:00
Devang Patel
497a397f3e Revert r135423. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135454 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:28:24 +00:00
Jeffrey Yasskin
3ba292dbc2 Add APInt(numBits, ArrayRef<uint64_t> bigVal) constructor to prevent future ambiguity 
errors like the one corrected by r135261.  Migrate all LLVM callers of the old
constructor to the new one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135431 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 21:45:40 +00:00
Devang Patel
1360bc8eb0 During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. 
[take 2]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135423 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 20:55:23 +00:00
Chris Lattner
db125cfaf5 land David Blaikie's patch to de-constify Type, with a few tweaks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135375 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 04:54:35 +00:00
Jay Foad
fc6d3a4986 Convert InsertValueInst and ExtractValueInst APIs to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135040 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 10:26:04 +00:00
Devang Patel
272511f518 Revert r133953 for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134116 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 23:50:13 +00:00
Evan Cheng
e837dead3c - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and 
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 19:10:37 +00:00
Devang Patel
016c5829a5 During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133953 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-27 22:32:04 +00:00
Devang Patel
8594d429e0 Handle debug info for i128 constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133821 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-24 20:46:11 +00:00
Eli Friedman
0b4d96baec PR10077: fix fast-isel of extractvalue of aggregate constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132676 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-06 05:46:34 +00:00
Eli Friedman
76927d7303 Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent. 
The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).

rdar://9437928 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132099 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 23:49:02 +00:00
Eli Friedman
482feb33b2 Make fast-isel work correctly s/uadd.with.overflow intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131420 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 21:06:17 +00:00
Eli Friedman
a4c920db7a Fix silly typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131419 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 20:34:53 +00:00
Eli Friedman
2586b8f936 Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131417 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 20:27:46 +00:00
Eli Friedman
d0118a2371 Fix a FIXME by moving the fast-isel implementation of the objectsize intrinsic from the x86 code to the generic code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131332 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-14 00:47:51 +00:00
Owen Anderson
d71867a8f4 Allow FastISel of three-register-operand instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130934 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-05 17:59:04 +00:00
Eli Friedman
b2b03fc2fa Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130560 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 23:34:52 +00:00