Jim Grosbach
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a738da7bd3
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ARM NEON VCLE is an alias for VCGE w/ the source operands reversed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146699 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-12-15 22:56:33 +00:00 |
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Jim Grosbach
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470855b24f
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ARM NEON VCLT(register) is a pseudo aliasing VCGT(register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146039 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-12-07 17:51:15 +00:00 |
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Jim Grosbach
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29e7b7deb4
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Clean up formatting a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137393 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-08-11 23:57:17 +00:00 |
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Jim Grosbach
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857e1a7b3f
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ARM vector compare to zero instruction assembly parsing support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137389 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-08-11 23:51:13 +00:00 |
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Bob Wilson
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8d1b7e57e5
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Fix misspelled target triples in MC/ARM test commands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121901 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-12-15 22:14:01 +00:00 |
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Owen Anderson
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c24cb3551e
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Add support for ARM's specialized vector-compare-against-zero instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118453 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-11-08 23:21:22 +00:00 |
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Owen Anderson
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95b9766fea
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Use ARM-style comment syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117941 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-11-01 18:33:37 +00:00 |
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Jim Grosbach
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833c93c795
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Mark ARM subtarget features that are available for the assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-11-01 16:59:54 +00:00 |
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Owen Anderson
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afe18c7cac
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Convert this test to .s form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117683 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-10-29 18:58:30 +00:00 |
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