Craig Topper
63bd926a41
Remove some unnecessary forward declarations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153245 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-22 06:52:14 +00:00
Craig Topper
70de1e442d
Fix some copy and paste remnants of Cell and SPU in Hexagon files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152981 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-17 09:39:20 +00:00
Craig Topper
8aea2dd964
Fix typo in file header.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152980 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-17 09:28:37 +00:00
Jia Liu
31d157ae1a
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-18 12:03:15 +00:00
Sirish Pande
b9f69a41fc
Test for commit access.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 15:20:33 +00:00
Brendon Cahoon
c635ebdb1a
Use TSFlag bit to describe instruction properties.
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Creating the isPredicated TSFlag enables the code
to use the property defined in the instruction format
instead of using a large switch statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 18:25:47 +00:00
Craig Topper
655b8de7b2
Convert assert(0) to llvm_unreachable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149814 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 07:21:30 +00:00
Tony Linthicum
d239ff67f2
Add MCTargetDesc library to Hexagon target
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146692 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 22:29:08 +00:00
