Hans Wennborg
f0234fcbc9
Implement the local-dynamic TLS model for x86 (PR3985)
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This implements codegen support for accesses to thread-local variables
using the local-dynamic model, and adds a clean-up pass so that the base
address for the TLS block can be re-used between local-dynamic access on
an execution path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157818 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 16:27:21 +00:00
Jakob Stoklund Olesen
ee66b417ef
Add support for return value promotion in X86 calling conventions.
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Patch by Yiannis Tsiouris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 17:28:20 +00:00
Justin Holewinski
d2ea0e10cb
Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall
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to pass around a struct instead of a large set of individual values. This
cleans up the interface and allows more information to be added to the struct
for future targets without requiring changes to each and every target.
NV_CONTRIB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25 16:35:28 +00:00
Craig Topper
85b9e56bac
Fix constant used for pshufb mask when lowering v16i8 shuffles. Bug introduced in r157043. Fixes PR12908.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157236 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-22 06:09:38 +00:00
Craig Topper
8ae97baef2
Allow 256-bit shuffles to still be split even if only half of the shuffle comes from two 128-bit pieces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-21 06:40:16 +00:00
Nadav Rotem
87d35e8c71
On Haswell, perfer storing YMM registers using a single instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157129 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19 20:30:08 +00:00
Nadav Rotem
4fc8a5de44
Add support for additional in-reg vbroadcast patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157127 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19 19:57:37 +00:00
Craig Topper
be97ae9e89
Simplify code a bit. No functional change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157044 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18 07:07:36 +00:00
Craig Topper
b82b5abf78
Simplify handling of v16i8 shuffles and fix a missed optimization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18 06:42:06 +00:00
Hans Wennborg
228756c744
Implement initial-exec TLS model for 32-bit PIC x86
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This fixes a TODO from 2007 :) Previously, LLVM would emit the wrong
code here (see the update to test/CodeGen/X86/tls-pie.ll).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156611 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11 10:11:01 +00:00
Nadav Rotem
b88e8dd31d
Fix merge-typo and cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156541 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10 12:50:02 +00:00
Nadav Rotem
b210651654
AVX2: Add an additional broadcast idiom.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156540 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10 12:39:13 +00:00
Nadav Rotem
5fc2187a02
Generate AVX/AVX2 shuffles even when there is a memory op somewhere else in the program.
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Starting r155461 we are able to select patterns for vbroadcast even when the load op is used by other users.
Fix PR11900.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156539 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10 12:22:05 +00:00
Chad Rosier
42726835e3
Fix a regression from r147481. This combine should only happen if there is a
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single use.
rdar://11360370
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156316 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-07 18:47:44 +00:00
Manman Ren
ed57984483
X86: optimization for -(x != 0)
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This patch will optimize -(x != 0) on X86
FROM
cmpl $0x01,%edi
sbbl %eax,%eax
notl %eax
TO
negl %edi
sbbl %eax %eax
In order to generate negl, I added patterns in Target/X86/X86InstrCompiler.td:
def : Pat<(X86sub_flag 0, GR32:$src), (NEG32r GR32:$src)>;
rdar: 10961709
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-07 18:06:23 +00:00
Craig Topper
d978c54e60
Use MVT instead of EVT as the argument to all the shuffle decode functions. Simplify some of the decode functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156268 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-06 19:46:21 +00:00
Craig Topper
bdcbcb3ae7
Add VPERMQ/VPERMPD to the list of target specific shuffles that can be looked through for DAG combine purposes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156266 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-06 18:54:26 +00:00
Benjamin Kramer
aaf723dd2b
Add a new target hook "predictableSelectIsExpensive".
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This will be used to determine whether it's profitable to turn a select into a
branch when the branch is likely to be predicted.
Currently enabled for everything but Atom on X86 and Cortex-A9 devices on ARM.
I'm not entirely happy with the name of this flag, suggestions welcome ;)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-05 12:49:14 +00:00
Craig Topper
31a207a3b7
Fix some loops to match coding standards. No functional change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156159 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-04 06:39:13 +00:00
Craig Topper
6643d9c180
Fix up some spacing. No functional change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156158 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-04 06:18:33 +00:00
Craig Topper
5da8a80377
Simplify broadcast lowering code. No functional change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156157 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-04 05:49:51 +00:00
Craig Topper
f3640d7ec1
Allow v16i16 and v32i8 shuffles to be rewritten as narrower shuffles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156156 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-04 04:44:49 +00:00
Craig Topper
11ac1f81a8
Simplify shuffle narrowing code a bit. No functional change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156154 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-04 04:08:44 +00:00
Craig Topper
b607264550
Use 'unsigned' instead of 'int' in a few places dealing with counts of vector elements.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03 07:26:59 +00:00
Craig Topper
6b28d356c5
Fix 256-bit vpshuflw and vpshufhw immediate encoding to handle undefs in the lower half correctly. Missed in r155982.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156059 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03 07:12:59 +00:00
Preston Gurd
c0f0a93936
For Intel Atom, use ILP scheduling always, instead of ILP for 64 bit
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and Hybrid for 32 bit, since benchmarks show ILP scheduling is better
most of the time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156028 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02 22:02:02 +00:00
Manman Ren
e2849851b2
Revert r155853
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The commit is intended to fix rdar://10961709.
But it is the root cause of PR12720.
Revert it for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155992 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02 15:24:32 +00:00
Craig Topper
a9a568a79d
Add support for selecting AVX2 vpshuflw and vpshufhw. Add decoding support for AsmPrinter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155982 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02 08:03:44 +00:00
Manman Ren
769ea2f93f
X86: optimization for max-like struct
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This patch will optimize the following cases on X86
(a > b) ? (a-b) : 0
(a >= b) ? (a-b) : 0
(b < a) ? (a-b) : 0
(b <= a) ? (a-b) : 0
FROM
movl %edi, %ecx
subl %esi, %ecx
cmpl %edi, %esi
movl $0, %eax
cmovll %ecx, %eax
TO
xorl %eax, %eax
subl %esi, %edi
cmovll %eax, %edi
movl %edi, %eax
rdar: 10734411
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155919 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 17:16:15 +00:00
Manman Ren
16a76519a5
X86: optimization for -(x != 0)
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This patch will optimize -(x != 0) on X86
FROM
cmpl $0x01,%edi
sbbl %eax,%eax
notl %eax
TO
negl %edi
sbbl %eax %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155853 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 22:51:25 +00:00
Chad Rosier
238ae31aa3
Tidy up. No functional change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155832 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 17:47:15 +00:00
Craig Topper
7d1e3dcf71
No need to normalize index before calling Extract128BitVector
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155811 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 05:17:10 +00:00
Jakub Staszak
6610b1db55
Remove unneeded casts. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155800 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 20:52:53 +00:00
Craig Topper
d77d2feb7a
Simplify code a bit. No functional change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155798 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 20:22:05 +00:00
Craig Topper
66ddd153f6
Use 'unsigned' instead of 'int' in several places when retrieving number of vector elements.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155742 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27 22:54:43 +00:00
Chad Rosier
a73b6fc511
Add x86-specific DAG combine to simplify:
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x == -y --> x+y == 0
x != -y --> x+y != 0
On x86, the generated code goes from
negl %esi
cmpl %esi, %edi
je .LBB0_2
to
addl %esi, %edi
je .L4
This case is correctly handled for ARM with "cmn".
Patch by Manman Ren.
rdar://11245199
PR12545
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155739 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27 22:33:25 +00:00
Craig Topper
b4a8aef96d
Tidy up spacing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155733 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27 21:05:09 +00:00
Benjamin Kramer
17c836c4b5
X86: Don't emit conditional floating point moves on when targeting pre-pentiumpro architectures.
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* Model FPSW (the FPU status word) as a register.
* Add ISel patterns for the FUCOM*, FNSTSW and SAHF instructions.
* During Legalize/Lowering, build a node sequence to transfer the comparison
result from FPSW into EFLAGS. If you're wondering about the right-shift: That's
an implicit sub-register extraction (%ax -> %ah) which is handled later on by
the instruction selector.
Fixes PR6679. Patch by Christoph Erhardt!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155704 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27 12:07:43 +00:00
Craig Topper
c16f851569
Use vector_shuffles instead of target specific unpack nodes for AVX ZERO_EXTEND/ANY_EXTEND combine. These will be converted to target specific nodes during lowering. This is more consistent with other code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155537 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-25 06:39:39 +00:00
Nadav Rotem
87ffdbcb7b
AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8
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immediate. We can't use it here because the shuffle code does not check that
the lower part of the word is identical to the upper part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155440 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-24 11:27:53 +00:00
Craig Topper
3ef43cf3a2
Remove dangling spaces. Fix some other formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155429 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-24 06:36:35 +00:00
Craig Topper
7fd5e16d3b
Simplify code a bit and make it compile better. Remove unused parameters.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155428 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-24 06:02:29 +00:00
Nadav Rotem
a35407705d
Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the integer type is i8 (commonly used in graphics).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155397 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 21:53:37 +00:00
Craig Topper
708e44fc96
Use MVT instead of EVT through all of LowerVECTOR_SHUFFLEtoBlend and not just the switch. Saves a little bit of binary size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155339 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 07:36:33 +00:00
Craig Topper
9d35240eee
Make getZeroVector and getOnesVector more alike as far as how they detect 128-bit versus 256-bit vectors. Be explicit about both sizes and use llvm_unreachable. Similar changes to getLegalSplat.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155337 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 07:24:41 +00:00
Craig Topper
69947b9cea
Tidy up by removing some 'else' after 'return'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155336 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 06:57:04 +00:00
Craig Topper
1842ba0dfc
Tidy up spacing in LowerVECTOR_SHUFFLEtoBlend. Remove code that checks if shuffle operand has a different type than the the shuffle result since it can never happen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155333 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 06:38:28 +00:00
Craig Topper
731dfd0da9
Add a couple llvm_unreachables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155332 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 03:42:40 +00:00
Craig Topper
0fbf364fd7
Remove some tab characers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155331 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 03:28:34 +00:00
Craig Topper
e8eb116ff3
Remove some 'else' after 'return'. No functional change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155330 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 03:26:18 +00:00