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2 Commits

Author SHA1 Message Date
Richard Sandiford
f9a5e40b90 Replace sra with srl if a single sign bit is required 
E.g. (and (sra (i32 x) 31) 2) -> (and (srl (i32 x) 30) 2).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192884 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-17 11:16:57 +00:00
Hal Finkel
2c77a625b7 Fix a PPC rlwimi instruction-selection bug 
Under certain (evidently rare) circumstances, this code used to convert OR(a,
AND(x, y)) into OR(a, x). This was incorrect.

While there, I've added a comment to the code immediately above.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185201 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-28 20:00:07 +00:00