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6 Commits

Author SHA1 Message Date
Tim Northover
a05d37e1f4 AArch64: print NEON lists with a space. 
This matches ARM64 behaviour, which I think is clearer. It also puts all the
churn from that difference into one easily ignored commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207116 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-24 14:06:20 +00:00
Tim Northover
7b4b261611 AArch64/ARM64: add more NEON tests. 
Mostly no testing this time, since they were just wrangling
target-specific intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206613 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-18 14:54:53 +00:00
Jiangning Liu
eeabc572b9 Add missing pattern matches to support ACLE intrinsics of AArch64 NEON. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197993 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-25 01:22:51 +00:00
Kevin Qin
0e8c1f5ca3 [AArch64 NEON] Fix a pattern match failure with NEON_VDUP. 
This failure caused by improper condition when lowering shuffle_vector
to scalar_to_vector. After this patch NEON_VDUP with v1i64 will not
be generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197966 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-24 08:11:47 +00:00
Kevin Qin
0a9ff8776b [AArch64 NEON]Implment loading vector constant form constant pool. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197551 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-18 06:26:04 +00:00
Hao Liu
36c7806f4e Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195078 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-19 02:17:05 +00:00