Evan Cheng 
							
						 
					 
					
						
						
							
						
						98d2d07d41 
					 
					
						
						
							
							Correctly handle physical register inputs. They are not explicit input operands in the resulting machine instrs.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55893  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-09-08 08:39:33 +00:00 
						 
				 
			
				
					
						
							
							
								Evan Cheng 
							
						 
					 
					
						
						
							
						
						d07b46e908 
					 
					
						
						
							
							Fix indentation of generated code.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55876  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-09-07 08:23:06 +00:00 
						 
				 
			
				
					
						
							
							
								Evan Cheng 
							
						 
					 
					
						
						
							
						
						34fc6ceb73 
					 
					
						
						
							
							Ignore multi-instruction patterns. e.g.  
						
						... 
						
						
						
						def : Pat<(i8 (trunc GR32:$src)),
          (i8 (EXTRACT_SUBREG (MOV32to32_ GR32:$src), x86_subreg_8bit))>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55875  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-09-07 08:19:51 +00:00 
						 
				 
			
				
					
						
							
							
								Evan Cheng 
							
						 
					 
					
						
						
							
						
						c3f44b0d63 
					 
					
						
						
							
							Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55679  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-09-03 00:03:49 +00:00 
						 
				 
			
				
					
						
							
							
								Owen Anderson 
							
						 
					 
					
						
						
							
						
						667d8f7607 
					 
					
						
						
							
							Add initial support for fast isel of instructions that have inputs pinned to physical registers.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55545  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-29 17:45:56 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						99b218218c 
					 
					
						
						
							
							Add a target callback for FastISel.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55512  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-28 23:21:34 +00:00 
						 
				 
			
				
					
						
							
							
								Owen Anderson 
							
						 
					 
					
						
						
							
						
						b5dbcb538b 
					 
					
						
						
							
							Add support for fast-isel of opcodes that require use of extract_subreg.  Because of how extract_subreg is treated, it requires special case handling.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55480  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-28 18:06:12 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						833ddf8430 
					 
					
						
						
							
							Update a comment to reflect recent changes.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55418  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-27 16:18:22 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						10df0fa73e 
					 
					
						
						
							
							Basic FastISel support for floating-point constants.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55401  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-27 01:09:54 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						72d63af3f7 
					 
					
						
						
							
							Refactor a bunch of FastISelEmitter code into a helper class, and  
						
						... 
						
						
						
						put each major step in a separate function. This makes the high
level sequence of events easier to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55385  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-26 21:21:20 +00:00 
						 
				 
			
				
					
						
							
							
								Owen Anderson 
							
						 
					 
					
						
						
							
						
						70647e81e3 
					 
					
						
						
							
							We need to check that the return type is correct, even in cases where we don't  
						
						... 
						
						
						
						have a return type that differs from the operand types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55376  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-26 18:50:00 +00:00 
						 
				 
			
				
					
						
							
							
								Owen Anderson 
							
						 
					 
					
						
						
							
						
						abb1f16881 
					 
					
						
						
							
							Throw the switch to allow FastISel to emit instructions whose return types different from their inputs.  Next step: adding lowering pattens in FastISel that actually use these newly available opcodes.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55349  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-26 01:22:59 +00:00 
						 
				 
			
				
					
						
							
							
								Owen Anderson 
							
						 
					 
					
						
						
							
						
						71669e51e5 
					 
					
						
						
							
							Enhance TableGen to emit code for FastISel of opcodes with variadic return types without slowing down opcodes that are not variadic.  No such opcodes are currently generated, but in theory it should be a matter of just hitting the switch.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55347  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-26 00:42:26 +00:00 
						 
				 
			
				
					
						
							
							
								Owen Anderson 
							
						 
					 
					
						
						
							
						
						0f84e4e310 
					 
					
						
						
							
							Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return  
						
						... 
						
						
						
						type down.  This is not currently used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55345  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-25 23:58:18 +00:00 
						 
				 
			
				
					
						
							
							
								Owen Anderson 
							
						 
					 
					
						
						
							
						
						7b2e579546 
					 
					
						
						
							
							Deepen the map structure tablegen uses to compute FastISel patterns, in preparation for having patterns  
						
						... 
						
						
						
						with return types that differ from their input types.  This is not yet used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55344  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-25 23:43:09 +00:00 
						 
				 
			
				
					
						
							
							
								Owen Anderson 
							
						 
					 
					
						
						
							
						
						6d0c25ec3a 
					 
					
						
						
							
							Add support for fast isel of (integer) immediate materialization pattens, and use them to support  
						
						... 
						
						
						
						bitcast of constants in fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55325  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-25 20:20:32 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						0bfb75277f 
					 
					
						
						
							
							Add a few comments.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55157  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-22 00:28:15 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						22bb31103d 
					 
					
						
						
							
							Factor out the predicate check code from DAGISelEmitter.cpp  
						
						... 
						
						
						
						and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-22 00:20:26 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						d5fe57d2f9 
					 
					
						
						
							
							Basic fast-isel support for instructions with constant int operands.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55099  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-21 01:41:07 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						520b50c00d 
					 
					
						
						
							
							Remove the code that limited FastISel to certain fixed signatures.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55096  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-21 00:35:26 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						c7f72de3b4 
					 
					
						
						
							
							Begin making more use of the FastISelEmitter class.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55093  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-21 00:19:05 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						83babdea5d 
					 
					
						
						
							
							Remove an obsolete todo comment.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55080  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-20 21:47:28 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						1e0ee4bc38 
					 
					
						
						
							
							Factor the code for determining the target-specific instruction  
						
						... 
						
						
						
						namespace out of the isel emitters and into common code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55079  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-20 21:45:57 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						bb466331e7 
					 
					
						
						
							
							Simplify FastISel's constructor argument list, make the FastISel  
						
						... 
						
						
						
						class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-20 21:05:57 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						cf711aa5b6 
					 
					
						
						
							
							For now, restrict FastISel to instructions that only involve one  
						
						... 
						
						
						
						register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55008  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-19 20:58:14 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						d1d2ee8ccb 
					 
					
						
						
							
							Factor out the code to scan an instruction's operands into a  
						
						... 
						
						
						
						helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55007  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-19 20:56:30 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						379cad44ec 
					 
					
						
						
							
							Add more comments.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55004  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-19 20:36:33 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						56e0f87dcc 
					 
					
						
						
							
							Fix indentation in FastISel tablegen-emitted code.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55003  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-19 20:31:38 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						f4137b5f40 
					 
					
						
						
							
							Add more checking to filter out more kinds of things that  
						
						... 
						
						
						
						FastISel doesn't support yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55002  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-19 20:30:54 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						567263462f 
					 
					
						
						
							
							80 columns.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54998  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-19 18:07:49 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						04b7dfb233 
					 
					
						
						
							
							Add a few doxygen comments.  
						
						... 
						
						
						
						git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54997  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-19 18:06:12 +00:00 
						 
				 
			
				
					
						
							
							
								Dan Gohman 
							
						 
					 
					
						
						
							
						
						b0cf29c5cf 
					 
					
						
						
							
							Initial checkin of the new "fast" instruction selection support. See  
						
						... 
						
						
						
						the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54751  91177308-0d34-0410-b5e6-96231b3b80d8 
						
						
					 
					
						2008-08-13 20:19:35 +00:00