Anton Korobeynikov
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e1676011c6
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Split A8/A9 itins - they already were too big.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100672 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-04-07 18:22:11 +00:00 |
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Anton Korobeynikov
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0a3e2b591c
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Fix itins for VABA
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100657 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-04-07 18:20:42 +00:00 |
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Anton Korobeynikov
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f8b5c63617
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VHADD differs from VHSUB at least on A9 - the former reads both operands in the second cycle, while the latter reads second operand in first cycle. Introduce new itin classes to catch this behavior. Whether this is true for A8 as well is WIP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100652 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-04-07 18:20:13 +00:00 |
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Anton Korobeynikov
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a31c6fb65e
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Define new itin classes for ARM <-> VFP reg moves to distinguish from NEON ops. Define proper scheduling itinerary for them on A9. A8 TRM does not specify latency for them at all :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100650 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-04-07 18:20:02 +00:00 |
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Anton Korobeynikov
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c492e09455
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Add new itin classes for FP16 <-> FP32 conversions and make uise of them for A9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100647 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-04-07 18:19:46 +00:00 |
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Anton Korobeynikov
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391b3431e2
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Make use of new reserved/required scheduling stuff: introduce VFP and NEON locks to model domain cross stalls precisly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100646 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-04-07 18:19:40 +00:00 |
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David Goodwin
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658ea60997
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Finish scheduling itineraries for NEON.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82788 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-09-25 18:38:29 +00:00 |
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David Goodwin
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1f52895692
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Make the end-of-itinerary mark explicit. Some cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82709 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-09-24 20:22:50 +00:00 |
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David Goodwin
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127221fbdc
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Checkpoint NEON scheduling itineraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82657 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-09-23 21:38:08 +00:00 |
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David Goodwin
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b2bb7db9e2
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Add Cortex-A8 VFP model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82483 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-09-21 20:52:17 +00:00 |
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David Goodwin
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5d598aaf3d
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Update Cortex-A8 instruction itineraries for integer instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79436 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-08-19 18:00:44 +00:00 |
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Evan Cheng
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bc9b754091
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Turn on if-conversion for thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79084 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-08-15 07:59:10 +00:00 |
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David Goodwin
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6d3d9c3fc3
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Finalize itineraries for cortex-a8 integer multiply
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78908 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-08-13 15:51:13 +00:00 |
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David Goodwin
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546952fd60
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Allow a zero cycle stage to reserve/require a FU without advancing the cycle counter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78736 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-08-11 22:38:43 +00:00 |
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David Goodwin
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bcf81629b8
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Checkpoint scheduling itinerary changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78564 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-08-10 15:56:13 +00:00 |
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Evan Cheng
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6762d91c05
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Add fake v7 itineraries for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76612 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-07-21 18:54:14 +00:00 |
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Evan Cheng
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8557c2bcb8
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Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73747 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-06-19 01:51:50 +00:00 |
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