459525df1e
don't create the post-ra scheduler unless it is enabled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45972 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-14 19:00:06 +00:00
93f96d00bf
Ammending r45669 with a missing file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45671 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 01:33:09 +00:00
3c42f12118
allow sinking to be enabled for the jit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45624 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-05 06:14:16 +00:00
cc8f603f53
Move option to enable machine LICM into LLVMTargetMachine.cpp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45572 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-04 08:11:03 +00:00
c4ce73f666
Add a really quick hack at a machine code sinking pass, enabled with --enable-sinking.
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It is missing validity checks, so it is known broken. However, it is powerful enough
to compile this contrived code:
void test1(int C, double A, double B, double *P) {
double Tmp = A*A+B*B;
*P = C ? Tmp : A;
}
into:
_test1:
movsd 8(%esp), %xmm0
cmpl $0, 4(%esp)
je LBB1_2 # entry
LBB1_1: # entry
movsd 16(%esp), %xmm1
mulsd %xmm1, %xmm1
mulsd %xmm0, %xmm0
addsd %xmm1, %xmm0
LBB1_2: # entry
movl 24(%esp), %eax
movsd %xmm0, (%eax)
ret
instead of:
_test1:
movsd 16(%esp), %xmm0
mulsd %xmm0, %xmm0
movsd 8(%esp), %xmm1
movapd %xmm1, %xmm2
mulsd %xmm2, %xmm2
addsd %xmm0, %xmm2
cmpl $0, 4(%esp)
je LBB1_2 # entry
LBB1_1: # entry
movapd %xmm2, %xmm1
LBB1_2: # entry
movl 24(%esp), %eax
movsd %xmm1, (%eax)
ret
woo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45570 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-04 07:36:53 +00:00
4ee451de36
Remove attribution from file headers, per discussion on llvmdev.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 20:36:04 +00:00
0f940c95d4
Initial commit of the machine code LICM pass. It successfully hoists this:
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_foo:
li r2, 0
LBB1_1: ; bb
li r5, 0
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
to:
_foo:
li r2, 0
li r5, 0
LBB1_1: ; bb
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
ZOMG!! :-)
Moar to come...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44687 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-07 21:42:31 +00:00
ada779fb11
Move subreg lowering pass to be right after regalloc, per feedback.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40548 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-27 07:36:14 +00:00
bab2474b64
Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40521 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26 08:18:32 +00:00
8bd6035750
Added -print-emitted-asm to print out JIT generated asm to cerr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40123 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-20 21:56:13 +00:00
72f1596403
Modify previous patch per review comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39817 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-13 17:31:29 +00:00
e7e7d0d7e3
Skeleton of post-RA scheduler; doesn't do anything yet.
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Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39816 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-13 17:13:54 +00:00
c3751600b7
Exception handling has been implemented.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39732 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 16:59:20 +00:00
85ef254630
document and hide two options.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37651 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 05:47:49 +00:00
e6e435498c
name change requested by review of previous patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37289 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-22 18:31:04 +00:00
81da02b553
Make tail merging the default, except on powerPC. There was no prior art
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for a target-dependent default with a command-line override; this way
should be generally usable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37285 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-22 17:14:46 +00:00
c8d288f8fa
move a bunch of code out of the sdisel pass into its own opt pass "codegenprepare".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35529 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31 04:18:03 +00:00
31442f9dc5
Add a -print-lsr-output option to LLC, to print the output of the LSR pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35522 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31 00:24:43 +00:00
0f54dcbf07
Now LoopStrengthReduce is a LoopPass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34984 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 21:14:09 +00:00
a4e7cd947e
Use exception flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34496 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-22 16:22:15 +00:00
04523eab6b
Split the addPassesToEmitFile method up into two. This is so that we can
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do some common stuff, then on our own add an object file writer (by calling
a concrete function), and then do some finishing stuff, if need be.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34032 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-08 01:36:53 +00:00
bcd2498f4f
Removed more <iostream> includes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32321 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 20:28:15 +00:00
e01eaa09c6
enable the branch folding pass for the JIT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31777 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 01:00:07 +00:00
9d4209fb82
1. Add a pass to fold debug label instructions so a debug info client can detect
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empty ranges.
2. Reorg how MachineDebugInfo maintains changes to debug labels.
3. Have dwarf writer use debug label info to simplify scopes and source line
coorespondence.
4. Revert the merging of compile units until I can get the bugs ironed out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31507 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-07 19:33:46 +00:00
62d07d6ace
Don't do dead block elimination in fast mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31155 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24 16:11:49 +00:00
4a84ad7a2b
add the branch folding pass as a late cleanup pass for all targets. For now
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it just deletes empty MBB's. Soon it will do more :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30941 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 20:45:56 +00:00
2a0013f59f
add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
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Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30095 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 06:21:35 +00:00
47877050e7
new file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30082 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 04:16:09 +00:00