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https://github.com/c64scene-ar/llvm-6502.git
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e928ceb9e6
When truncating to non-legal types (such as i16, i8 and i1) always use an AND instruction to mask out the upper bits. This was only done when the source type was an i64, but not when the source type was an i32. This commit fixes this and adds the missing i32 truncate tests. This fixes rdar://problem/21990703. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243198 91177308-0d34-0410-b5e6-96231b3b80d8
40 lines
1.4 KiB
LLVM
40 lines
1.4 KiB
LLVM
; RUN: llc %s -o - -O2 -verify-machineinstrs -fast-isel=true | FileCheck %s
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-ios8.0.0"
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; This test was trying to fold the sext %tmp142 in to the address arithmetic in %sunkaddr1.
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; This was incorrect as %.mux isn't available in the last bb.
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; CHECK: sxtw [[REG:x[0-9]+]]
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; CHECK: strh wzr, {{\[}}{{.*}}, [[REG]], lsl #1]
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; Function Attrs: nounwind optsize ssp
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define void @EdgeLoop(i32 %dir, i32 %edge, i32 %width, i16* %tmp89, i32 %tmp136, i16 %tmp144) #0 {
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bb:
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%tmp2 = icmp eq i32 %dir, 0
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%.mux = select i1 %tmp2, i32 %width, i32 1
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%tmp142 = sext i32 %.mux to i64
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%tmp151 = shl nsw i64 %tmp142, 1
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%tmp153 = getelementptr inbounds i16, i16* %tmp89, i64 %tmp151
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%tmp154 = load i16, i16* %tmp153, align 2
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%tmp155 = zext i16 %tmp154 to i32
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br i1 %tmp2, label %bb225, label %bb212
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bb212: ; preds = %bb
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store i16 %tmp144, i16* %tmp89, align 2
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ret void
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bb225: ; preds = %bb
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%tmp248 = trunc i32 %tmp155 to i16
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store i16 %tmp248, i16* %tmp89, align 2
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%sunkaddr = ptrtoint i16* %tmp89 to i64
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%sunkaddr1 = mul i64 %tmp142, 2
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%sunkaddr2 = add i64 %sunkaddr, %sunkaddr1
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%sunkaddr3 = inttoptr i64 %sunkaddr2 to i16*
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store i16 0, i16* %sunkaddr3, align 2
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ret void
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}
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attributes #0 = { nounwind optsize ssp }
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