mirror of
				https://github.com/c64scene-ar/llvm-6502.git
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	Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
		
	
		
			
				
	
	
		
			71 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
			
		
		
	
	
			71 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
| ; RUN: llc -march=hexagon < %s | FileCheck %s
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| ; Check that we generate load instruction with (base + register offset << x)
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| 
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| ; load word
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| 
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| define i32 @load_w(i32* nocapture %a, i32 %n, i32 %m) nounwind {
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| ; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(r{{[0-9]+}}{{ *}}+{{ *}}r{{[0-9]+}}{{ *}}<<{{ *}}#2)
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| entry:
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|   %tmp = add i32 %n, %m
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|   %scevgep9 = getelementptr i32, i32* %a, i32 %tmp
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|   %val = load i32, i32* %scevgep9, align 4
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|   ret i32 %val
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| }
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| 
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| ; load unsigned half word
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| 
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| define i16 @load_uh(i16* nocapture %a, i32 %n, i32 %m) nounwind {
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| ; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memuh(r{{[0-9]+}}{{ *}}+{{ *}}r{{[0-9]+}}{{ *}}<<#1)
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| entry:
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|   %tmp = add i32 %n, %m
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|   %scevgep9 = getelementptr i16, i16* %a, i32 %tmp
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|   %val = load i16, i16* %scevgep9, align 2
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|   ret i16 %val
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| }
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| 
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| ; load signed half word
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| 
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| define i32 @load_h(i16* nocapture %a, i32 %n, i32 %m) nounwind {
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| ; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memh(r{{[0-9]+}}{{ *}}+{{ *}}r{{[0-9]+}}{{ *}}<<#1)
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| entry:
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|   %tmp = add i32 %n, %m
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|   %scevgep9 = getelementptr i16, i16* %a, i32 %tmp
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|   %val = load i16, i16* %scevgep9, align 2
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|   %conv = sext i16 %val to i32
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|   ret i32 %conv
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| }
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| 
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| ; load unsigned byte
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| 
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| define i8 @load_ub(i8* nocapture %a, i32 %n, i32 %m) nounwind {
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| ; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memub(r{{[0-9]+}}{{ *}}+{{ *}}r{{[0-9]+}}{{ *}}<<#0)
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| entry:
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|   %tmp = add i32 %n, %m
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|   %scevgep9 = getelementptr i8, i8* %a, i32 %tmp
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|   %val = load i8, i8* %scevgep9, align 1
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|   ret i8 %val
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| }
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| 
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| ; load signed byte
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| 
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| define i32 @foo_2(i8* nocapture %a, i32 %n, i32 %m) nounwind {
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| ; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memb(r{{[0-9]+}}{{ *}}+{{ *}}r{{[0-9]+}}{{ *}}<<{{ *}}#0)
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| entry:
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|   %tmp = add i32 %n, %m
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|   %scevgep9 = getelementptr i8, i8* %a, i32 %tmp
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|   %val = load i8, i8* %scevgep9, align 1
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|   %conv = sext i8 %val to i32
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|   ret i32 %conv
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| }
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| 
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| ; load doubleword
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| 
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| define i64 @load_d(i64* nocapture %a, i32 %n, i32 %m) nounwind {
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| ; CHECK: r{{[0-9]+}}:{{[0-9]+}}{{ *}}={{ *}}memd(r{{[0-9]+}}{{ *}}+{{ *}}r{{[0-9]+}}{{ *}}<<{{ *}}#3)
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| entry:
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|   %tmp = add i32 %n, %m
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|   %scevgep9 = getelementptr i64, i64* %a, i32 %tmp
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|   %val = load i64, i64* %scevgep9, align 8
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|   ret i64 %val
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| }
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