Stuart Hastings 007cfce220 Move this test to CodeGen/Thumb. rdar://problem/9416774 ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131196 91177308-0d34-0410-b5e6-96231b3b80d8

2011-05-11 19:41:28 +00:00

..

Alpha

…

ARM

Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain).

2011-05-11 14:40:50 +00:00

Blackfin

Don't completely eliminate identity copies that also modify super register liveness.

2011-03-31 17:55:25 +00:00

CBackend

…

CellSPU

don't test for codegen of 'store undef'

2011-04-09 02:31:26 +00:00

CPP

…

Generic

Un-XFAIL this test for ARM. <rdar://problem/7662569>

2011-04-20 21:47:45 +00:00

MBlaze

Add scheduling information for the MBlaze backend.

2011-04-11 22:31:52 +00:00

Mips

Remove LLVM IR metadata in test case committed in r130847.

2011-05-04 18:28:36 +00:00

MSP430

Fix register-dependent test in MSP430.

2011-05-04 01:01:39 +00:00

PowerPC

FileCheckize and break dependence on coalescing order.

2011-05-04 19:02:01 +00:00

PTX

PTX: add test cases for cvt, fneg, and selp

2011-05-10 14:53:13 +00:00

SPARC

Fix more register and coalescing dependencies.

2011-05-04 19:02:11 +00:00

SystemZ

Fix SystemZ tests

2011-03-31 23:02:12 +00:00

Thumb

Move this test to CodeGen/Thumb. rdar://problem/9416774

2011-05-11 19:41:28 +00:00

Thumb2

Re-revert r130877; it's apparently causing a regression on 197.parser,

2011-05-06 05:23:07 +00:00

X86

Identify end of prologue (and beginning of function body) using DW_LNS_set_prologue_end line table opcode.

2011-05-11 19:22:19 +00:00

XCore

Fix register-dependent XCore tests

2011-05-04 01:01:41 +00:00