Quentin Colombet 0206b30ea6 [DAGCombiner] PCMP* sets its result to all ones or zeros so we can AND with the ... shifted mask rather than masking and shifting separately. The patch adds this transformation to the DAGCombiner:   (shl (and (setcc:i8v16 ...) N01C) N1C) -> (and (setcc:i8v16 ...) N01C<<N1C) <rdar://problem/16054492> Patch by Adam Nemet <anemet@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201906 91177308-0d34-0410-b5e6-96231b3b80d8		2014-02-21 23:42:41 +00:00
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AArch64	[AArch64] Add register constraints to avoid generating STLXR and STXR with unpredictable behavior.	2014-02-21 07:45:48 +00:00
ARM	Use 16 byte stack alignment for NaCl on ARM	2014-02-16 18:59:48 +00:00
CPP
Generic
Hexagon
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Mips	[mips] Make it impossible to have UnknownABI in CodeGen and Integrated Assembler.	2014-02-20 14:58:19 +00:00
MSP430
NVPTX
PowerPC	Add back r201608, r201622, r201624 and r201625	2014-02-19 17:23:20 +00:00
R600	Fix more broken CHECK lines	2014-02-16 13:28:39 +00:00
SPARC	Expand 64bit {SHL,SHR,SRA}_PARTS on sparcv9.	2014-02-19 21:35:39 +00:00
SystemZ
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X86	[DAGCombiner] PCMP* sets its result to all ones or zeros so we can AND with the	2014-02-21 23:42:41 +00:00
XCore	XCore target: Handle common linkage	2014-02-18 11:21:59 +00:00