Hal Finkel 025c1cefca When using CR bit registers on PPC32, handle the i1 vaarg case ... When copying an i1 value into a GPR for a vaarg call, we need to explicitly zero-extend the i1 value (otherwise an invalid CRBIT -> GPR copy will be generated). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203041 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-06 00:23:33 +00:00
..
Analysis
Assembler
Bindings
Bitcode	Ensure bitcode encoding of instructions and their operands stays stable.	2014-03-02 15:26:36 +00:00
BugPoint
CodeGen	When using CR bit registers on PPC32, handle the i1 vaarg case	2014-03-06 00:23:33 +00:00
DebugInfo	Add DWARF discriminator support to DILexicalBlocks.	2014-03-03 18:53:17 +00:00
ExecutionEngine
Feature	Change math intrinsic attributes from readonly to readnone. These	2014-03-06 00:18:15 +00:00
FileCheck
Instrumentation	[msan] Handle X86 SIMD bitshift intrinsics.	2014-03-03 13:47:42 +00:00
Integer
JitListener
Linker	Fix datalayout test that I broke with my previous LinkModules warning improvement.	2014-03-05 21:37:08 +00:00
LTO
MC	This patch implements .set dsp directive and sets appropriate feature bits.This directive is a counterpart of -mattr=dsp command line option with the exception that it does not influence elf header flags. The usage example is gives in test file.	2014-03-05 11:05:09 +00:00
Object
Other
TableGen
tools	llvm-objdump: Indent unwind info contents.	2014-03-04 19:23:56 +00:00
Transforms	Change math intrinsic attributes from readonly to readnone. These	2014-03-06 00:18:15 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt	[CMake] check-llvm: Include "bugpoint" in dependent list.	2014-03-04 16:13:30 +00:00
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh