Kevin Enderby e38070fc32 Added the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction. ...

While the .td entry is nice and all, it takes a pretty gross hack in
ARMAsmParser::ParseInstruction() because of handling of other "subs"
instructions to get it to match.  Ran it by Jim Grosbach and he said it was
about what he expected to make this work given the existing code.

rdar://14214063


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187530 91177308-0d34-0410-b5e6-96231b3b80d8

2013-07-31 21:05:30 +00:00

..

arm-LDREXD-reencoding.txt

ARM: Fix STREX/LDREX reecoding

2013-06-11 08:03:20 +00:00

arm-STREXD-reencoding.txt

ARM: Fix STREX/LDREX reecoding

2013-06-11 08:03:20 +00:00

arm-tests.txt

This reverts r155000.

2013-06-20 17:42:36 +00:00

arm-thumb-trustzone.txt

ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.

2013-04-10 12:08:35 +00:00

arm-trustzone.txt

ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.

2013-04-10 12:08:35 +00:00

basic-arm-instructions.txt

ARM: ISB cannot be passed the same options as DMB

2013-06-10 14:17:08 +00:00

fp-encoding.txt

This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.

2013-06-11 09:39:51 +00:00

hex-immediates.txt

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invalid-armv7.txt

Add not so that these tests pass with pipefail enabled.

2013-07-23 13:18:20 +00:00

invalid-because-armv7.txt

Add not so that these tests pass with pipefail enabled.

2013-07-23 13:18:20 +00:00

invalid-FSTMX-arm.txt

ARM: add fstmx and fldmx instructions for assembly

2013-05-31 15:55:51 +00:00

invalid-IT-CC15.txt

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invalid-thumbv7-xfail.txt

Improve llvm-mc disassembler mode and refactor ARM tests to use it

2013-07-19 10:05:04 +00:00

invalid-thumbv7.txt

Add not so that these tests pass with pipefail enabled.

2013-07-23 13:18:20 +00:00

ldrd-armv4.txt

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lit.local.cfg

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marked-up-thumb.txt

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memory-arm-instructions.txt

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neon-tests.txt

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neon-v8.txt

[ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.

2013-07-19 16:34:16 +00:00

neon.txt

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neont2.txt

ARM: Enforce decoding rules for VLDn instructions

2013-06-11 08:14:14 +00:00

neont-VLD-reencoding.txt

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neont-VST-reencoding.txt

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thumb1.txt

This corrects the implementation of Thumb ADR instruction. There are three issues:

2013-07-03 09:21:44 +00:00

thumb2.txt

Added the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction.

2013-07-31 21:05:30 +00:00

thumb-MSR-MClass.txt

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thumb-neon-v8.txt

[ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.

2013-07-19 16:34:16 +00:00

thumb-printf.txt

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thumb-tests.txt

ARM: fix thumb coprocessor instruction with pre-writeback disassembly

2013-06-14 11:21:35 +00:00

thumb-v8fp.txt

Add Thumb tests for the ARMv8 FP instructions that I recently added.

2013-07-18 10:20:25 +00:00

unpredictable-ADC-arm.txt

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unpredictable-ADDREXT3-arm.txt

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unpredictable-AExtI-arm.txt

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unpredictable-AI1cmp-arm.txt

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unpredictable-BFI.txt

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unpredictable-LDR-arm.txt

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unpredictable-LDRD-arm.txt

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unpredictable-LSL-regform.txt

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unpredictable-MRRC2-arm.txt

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unpredictable-MRS-arm.txt

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unpredictable-MUL-arm.txt

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unpredictable-RSC-arm.txt

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unpredictable-SEL-arm.txt

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unpredictable-SHADD16-arm.txt

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unpredictable-SSAT-arm.txt

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unpredictable-STRBrs-arm.txt

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unpredictable-swp-arm.txt

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unpredictable-UQADD8-arm.txt

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unpredictables-thumb.txt

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v8fp.txt

Add MC assembly/disassembly support for VRINT{A, N, P, M} to V8FP.

2013-07-09 11:26:18 +00:00

vfp4.txt

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