Jakob Stoklund Olesen 0472e040cb Revert r139247 "Cache intermediate results during traceSiblingValue." ...

It broke the self host and clang-x86_64-darwin10-RA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139259 91177308-0d34-0410-b5e6-96231b3b80d8

2011-09-07 21:43:52 +00:00

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Analysis

memset_pattern16 uses a 16 BYTE pattern, not a 16 BIT pattern. Add comments to that effect.

2011-09-06 23:43:26 +00:00

Archive

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AsmParser

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Bitcode

Don't forget to add the landingpad and resume instructions to the InstructionList.

2011-09-01 00:50:20 +00:00

CodeGen

Revert r139247 "Cache intermediate results during traceSiblingValue."

2011-09-07 21:43:52 +00:00

CompilerDriver

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ExecutionEngine

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Linker

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MC

Refactor instprinter and mcdisassembler to take a SubtargetInfo. Add -mattr= handling to llvm-mc. Reviewed by Owen Anderson.

2011-09-07 17:24:38 +00:00

Object

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Support

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Target

Thumb2 assembly parsing and encoding for LDRB(immediate).

2011-09-07 21:41:25 +00:00

Transforms

Add -verify-indvars for imperfect SCEV trip count verification after indvars.

2011-09-06 20:20:38 +00:00

VMCore

Add codegen support for vector select (in the IR this means a select

2011-09-06 19:07:46 +00:00

CMakeLists.txt

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Makefile

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