Brian Gaeke 76e3dc798b Make the .inc file depend on $(TBLGEN), so that changes to TableGen followed ...

by a re-link of TableGen will notify Make to rebuild the .inc file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6512 91177308-0d34-0410-b5e6-96231b3b80d8

2003-06-01 04:52:51 +00:00

..

InstrSched

Changes to allow explicit physical register arguments that have been

2003-05-31 07:37:05 +00:00

InstrSelection

Added MachineCodeForInstruction object as an argument to

2003-05-31 07:41:24 +00:00

LiveVar

Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()

2003-05-27 00:06:48 +00:00

ModuloScheduling

so far everything compiles

2003-05-30 00:17:09 +00:00

RegAlloc

Minor changes.

2003-05-31 07:41:54 +00:00

.cvsignore

Since there is now another derived .inc file, ignore them all.

2003-05-29 20:15:27 +00:00

EmitBytecodeToAssembly.cpp

changed implementation of LLVM BYTECODE Length

2002-07-25 17:22:48 +00:00

MachineCodeForInstruction.h

Move annotation to support library

2003-01-14 21:29:58 +00:00

MachineFunctionInfo.h

State for frame and constant pool information pulled out of MachineFunction

2002-12-28 20:07:33 +00:00

MachineInstrAnnot.h

Renamed a variable.

2003-05-31 07:43:41 +00:00

Makefile

Make the .inc file depend on $(TBLGEN), so that changes to TableGen followed

2003-06-01 04:52:51 +00:00

MappingInfo.cpp

Replaced uses of deprecated `MachineFunction::get(BasicBlock *BB)'.

2002-10-28 20:00:31 +00:00

MappingInfo.h

moved from CodeGen to this dir

2002-07-22 22:09:35 +00:00

SparcV9_F2.td

* Broke up SparcV9.td into separate files as it was getting unmanageable

2003-05-29 03:31:43 +00:00

SparcV9_F3.td

The 'rd' register is consistently mentioned last in instruction definitions.

2003-05-31 06:25:19 +00:00

SparcV9_F4.td

* Broke up SparcV9.td into separate files as it was getting unmanageable

2003-05-29 03:31:43 +00:00

SparcV9_Reg.td

* Broke up SparcV9.td into separate files as it was getting unmanageable

2003-05-29 03:31:43 +00:00

SparcV9.burg.in

Add support for compiling varargs functions.

2003-05-25 15:59:47 +00:00

SparcV9.td

* Put back into action SLL/SRL/SRA{r,i}6 instructions

2003-05-31 06:24:29 +00:00

SparcV9AsmPrinter.cpp

Reverting previous beautification changes.

2003-05-31 07:27:17 +00:00

SparcV9CodeEmitter.cpp

Removed useless code -- the byte order of output code is correct as is.

2003-05-31 06:26:06 +00:00

SparcV9CodeEmitter.h

Added:

2003-05-30 20:17:33 +00:00

SparcV9Instr.def

Made the register and immediate versions of instructions consecutive.

2003-05-30 19:14:01 +00:00

SparcV9InstrInfo.cpp

Extensive changes to the way code generation occurs for function

2003-05-31 07:32:01 +00:00

SparcV9InstrSelection.cpp

Extensive changes to the way code generation occurs for function

2003-05-31 07:32:01 +00:00

SparcV9InstrSelectionSupport.h

Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes.

2003-05-30 20:11:56 +00:00

SparcV9Internals.h

Extensive changes to the way code generation occurs for function

2003-05-31 07:32:01 +00:00

SparcV9PeepholeOpts.cpp

Cleaned up code layout; no functional changes.

2003-05-23 19:20:57 +00:00

SparcV9PreSelection.cpp

Several bug fixes: globals in call operands were not being pulled out;

2003-05-31 07:34:57 +00:00

SparcV9PrologEpilogInserter.cpp

Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.

2003-05-27 22:35:43 +00:00

SparcV9RegClassInfo.cpp

Fixed `volatile' typo.

2003-05-21 19:34:28 +00:00

SparcV9RegClassInfo.h

Added special register class containing (for now) %fsr.

2003-05-27 00:02:22 +00:00

SparcV9RegInfo.cpp

Add map info for arguments to call (copies)

2003-06-01 02:48:23 +00:00

SparcV9SchedInfo.cpp

Added entries for each of the instructions with annotations ('r' or 'i').

2003-05-27 22:33:39 +00:00

SparcV9StackSlots.cpp

Rename MachineInstrInfo -> TargetInstrInfo

2003-01-14 22:00:31 +00:00

SparcV9TargetMachine.cpp

Enabling some of these passes causes lli to break

2003-05-31 04:23:04 +00:00