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dff84b0325
pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120635 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
1.4 KiB
C++
46 lines
1.4 KiB
C++
//===-- ARM/ARMFixupKinds.h - ARM Specific Fixup Entries --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_ARM_ARMFIXUPKINDS_H
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#define LLVM_ARM_ARMFIXUPKINDS_H
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#include "llvm/MC/MCFixup.h"
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namespace llvm {
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namespace ARM {
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enum Fixups {
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// fixup_arm_ldst_pcrel_12 - 12-bit PC relative relocation for symbol
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// addresses
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fixup_arm_ldst_pcrel_12 = FirstTargetFixupKind,
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// fixup_arm_pcrel_10 - 10-bit PC relative relocation for symbol addresses
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// used in VFP and Thumb2 instructions where the lower 2 bits are not encoded
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// (so it's encoded as an 8-bit immediate).
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fixup_arm_pcrel_10,
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// fixup_arm_adr_pcrel_12 - 12-bit PC relative relocation for the ADR
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// instruction.
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fixup_arm_adr_pcrel_12,
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// fixup_arm_brnach - 24-bit PC relative relocation for direct branch
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// instructions.
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fixup_arm_branch,
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// The next two are for the movt/movw pair
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// the 16bit imm field are split into imm{15-12} and imm{11-0}
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// Fixme: We need new ones for Thumb.
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fixup_arm_movt_hi16, // :upper16:
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fixup_arm_movw_lo16, // :lower16:
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// Marker
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LastTargetFixupKind,
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NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
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};
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}
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}
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#endif
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