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https://github.com/c64scene-ar/llvm-6502.git
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320296a4cf
This patch fixes an old FIXME by creating a MCTargetStreamer interface and moving the target specific functions for ARM, Mips and PPC to it. The ARM streamer is still declared in a common place because it is used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are completely hidden in the corresponding Target directories. I will send an email to llvmdev with instructions on how to use this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192181 91177308-0d34-0410-b5e6-96231b3b80d8
299 lines
11 KiB
C++
299 lines
11 KiB
C++
//===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides Mips specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsMCTargetDesc.h"
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#include "InstPrinter/MipsInstPrinter.h"
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#include "MipsMCAsmInfo.h"
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#include "MipsTargetStreamer.h"
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#include "llvm/MC/MCCodeGenInfo.h"
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#include "llvm/MC/MCELF.h"
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#include "llvm/MC/MCELFStreamer.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/MachineLocation.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Support/TargetRegistry.h"
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#define GET_INSTRINFO_MC_DESC
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#include "MipsGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "MipsGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "MipsGenRegisterInfo.inc"
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using namespace llvm;
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static cl::opt<bool> PrintHackDirectives("print-hack-directives",
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cl::init(false), cl::Hidden);
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static std::string ParseMipsTriple(StringRef TT, StringRef CPU) {
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std::string MipsArchFeature;
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size_t DashPosition = 0;
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StringRef TheTriple;
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// Let's see if there is a dash, like mips-unknown-linux.
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DashPosition = TT.find('-');
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if (DashPosition == StringRef::npos) {
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// No dash, we check the string size.
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TheTriple = TT.substr(0);
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} else {
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// We are only interested in substring before dash.
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TheTriple = TT.substr(0,DashPosition);
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}
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if (TheTriple == "mips" || TheTriple == "mipsel") {
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if (CPU.empty() || CPU == "mips32") {
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MipsArchFeature = "+mips32";
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} else if (CPU == "mips32r2") {
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MipsArchFeature = "+mips32r2";
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}
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} else {
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if (CPU.empty() || CPU == "mips64") {
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MipsArchFeature = "+mips64";
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} else if (CPU == "mips64r2") {
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MipsArchFeature = "+mips64r2";
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}
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}
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return MipsArchFeature;
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}
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static MCInstrInfo *createMipsMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitMipsMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitMipsMCRegisterInfo(X, Mips::RA);
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return X;
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}
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static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
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StringRef FS) {
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std::string ArchFS = ParseMipsTriple(TT,CPU);
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if (!FS.empty()) {
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if (!ArchFS.empty())
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ArchFS = ArchFS + "," + FS.str();
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else
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ArchFS = FS;
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}
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MCSubtargetInfo *X = new MCSubtargetInfo();
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InitMipsMCSubtargetInfo(X, TT, CPU, ArchFS);
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return X;
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}
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static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
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MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
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unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, SP, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
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CodeModel::Model CM,
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CodeGenOpt::Level OL) {
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MCCodeGenInfo *X = new MCCodeGenInfo();
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if (CM == CodeModel::JITDefault)
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RM = Reloc::Static;
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else if (RM == Reloc::Default)
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RM = Reloc::PIC_;
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X->InitMCCodeGenInfo(RM, CM, OL);
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return X;
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}
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static MCInstPrinter *createMipsMCInstPrinter(const Target &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI) {
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return new MipsInstPrinter(MAI, MII, MRI);
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}
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namespace {
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class MipsTargetAsmStreamer : public MipsTargetStreamer {
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formatted_raw_ostream &OS;
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public:
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MipsTargetAsmStreamer(formatted_raw_ostream &OS);
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virtual void emitMipsHackELFFlags(unsigned Flags);
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virtual void emitMipsHackSTOCG(MCSymbol *Sym, unsigned Val);
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};
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MipsTargetAsmStreamer::MipsTargetAsmStreamer(formatted_raw_ostream &OS)
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: OS(OS) {}
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void MipsTargetAsmStreamer::emitMipsHackELFFlags(unsigned Flags) {
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if (!PrintHackDirectives)
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return;
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OS << "\t.mips_hack_elf_flags 0x";
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OS.write_hex(Flags);
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OS << '\n';
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}
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void MipsTargetAsmStreamer::emitMipsHackSTOCG(MCSymbol *Sym, unsigned Val) {
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if (!PrintHackDirectives)
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return;
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OS << "\t.mips_hack_stocg ";
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OS << Sym->getName();
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OS << ", ";
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OS << Val;
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OS << '\n';
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}
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class MipsTargetELFStreamer : public MipsTargetStreamer {
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public:
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MCELFStreamer &getStreamer();
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MipsTargetELFStreamer();
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virtual void emitMipsHackELFFlags(unsigned Flags);
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virtual void emitMipsHackSTOCG(MCSymbol *Sym, unsigned Val);
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};
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MipsTargetELFStreamer::MipsTargetELFStreamer() {}
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MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
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return static_cast<MCELFStreamer &>(*Streamer);
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}
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void MipsTargetELFStreamer::emitMipsHackELFFlags(unsigned Flags) {
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MCAssembler &MCA = getStreamer().getAssembler();
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MCA.setELFHeaderEFlags(Flags);
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}
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// Set a symbol's STO flags
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void MipsTargetELFStreamer::emitMipsHackSTOCG(MCSymbol *Sym, unsigned Val) {
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MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Sym);
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// The "other" values are stored in the last 6 bits of the second byte
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// The traditional defines for STO values assume the full byte and thus
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// the shift to pack it.
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MCELF::setOther(Data, Val >> 2);
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}
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}
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static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
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MCContext &Context, MCAsmBackend &MAB,
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raw_ostream &OS, MCCodeEmitter *Emitter,
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bool RelaxAll, bool NoExecStack) {
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MipsTargetELFStreamer *S = new MipsTargetELFStreamer();
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return createELFStreamer(Context, S, MAB, OS, Emitter, RelaxAll, NoExecStack);
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}
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static MCStreamer *
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createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
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bool isVerboseAsm, bool useLoc, bool useCFI,
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bool useDwarfDirectory, MCInstPrinter *InstPrint,
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MCCodeEmitter *CE, MCAsmBackend *TAB, bool ShowInst) {
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MipsTargetAsmStreamer *S = new MipsTargetAsmStreamer(OS);
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return llvm::createAsmStreamer(Ctx, S, OS, isVerboseAsm, useLoc, useCFI,
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useDwarfDirectory, InstPrint, CE, TAB,
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ShowInst);
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}
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extern "C" void LLVMInitializeMipsTargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
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RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
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RegisterMCAsmInfoFn A(TheMips64Target, createMipsMCAsmInfo);
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RegisterMCAsmInfoFn B(TheMips64elTarget, createMipsMCAsmInfo);
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// Register the MC codegen info.
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TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget,
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createMipsMCCodeGenInfo);
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TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget,
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createMipsMCCodeGenInfo);
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TargetRegistry::RegisterMCCodeGenInfo(TheMips64Target,
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createMipsMCCodeGenInfo);
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TargetRegistry::RegisterMCCodeGenInfo(TheMips64elTarget,
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createMipsMCCodeGenInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget,
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createMipsMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
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TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
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TargetRegistry::RegisterMCRegInfo(TheMips64Target, createMipsMCRegisterInfo);
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TargetRegistry::RegisterMCRegInfo(TheMips64elTarget,
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createMipsMCRegisterInfo);
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// Register the MC Code Emitter
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TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget,
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createMipsMCCodeEmitterEB);
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TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
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createMipsMCCodeEmitterEL);
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TargetRegistry::RegisterMCCodeEmitter(TheMips64Target,
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createMipsMCCodeEmitterEB);
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TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget,
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createMipsMCCodeEmitterEL);
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// Register the object streamer.
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TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer);
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TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer);
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TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer);
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TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget,
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createMCStreamer);
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// Register the asm streamer.
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TargetRegistry::RegisterAsmStreamer(TheMipsTarget, createMCAsmStreamer);
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TargetRegistry::RegisterAsmStreamer(TheMipselTarget, createMCAsmStreamer);
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TargetRegistry::RegisterAsmStreamer(TheMips64Target, createMCAsmStreamer);
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TargetRegistry::RegisterAsmStreamer(TheMips64elTarget, createMCAsmStreamer);
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// Register the asm backend.
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TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
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createMipsAsmBackendEB32);
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TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
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createMipsAsmBackendEL32);
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TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
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createMipsAsmBackendEB64);
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TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
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createMipsAsmBackendEL64);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
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createMipsMCSubtargetInfo);
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TargetRegistry::RegisterMCSubtargetInfo(TheMipselTarget,
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createMipsMCSubtargetInfo);
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TargetRegistry::RegisterMCSubtargetInfo(TheMips64Target,
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createMipsMCSubtargetInfo);
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TargetRegistry::RegisterMCSubtargetInfo(TheMips64elTarget,
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createMipsMCSubtargetInfo);
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// Register the MCInstPrinter.
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TargetRegistry::RegisterMCInstPrinter(TheMipsTarget,
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createMipsMCInstPrinter);
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TargetRegistry::RegisterMCInstPrinter(TheMipselTarget,
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createMipsMCInstPrinter);
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TargetRegistry::RegisterMCInstPrinter(TheMips64Target,
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createMipsMCInstPrinter);
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TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget,
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createMipsMCInstPrinter);
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}
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