llvm-6502/test/CodeGen
Manman Ren 05324ab015 This patch teaches the DAGCombiner how to fold insert_subvector nodes
when the input is a concat_vectors and the insert replaces one of the
concat halves:

Lower half: fold (insert_subvector (concat_vectors X, Y), Z) ->
(concat_vectors Z, Y)
Upper half: fold (insert_subvector (concat_vectors X, Y), Z) ->
(concat_vectors X, Z)

This can be seen with the following IR:

define <8 x float> @lower_half(<4 x float> %v1, <4 x float> %v2, <4 x
float> %v3) {
  %1 = shufflevector <4 x float> %v1, <4 x float> %v2, <8 x i32> <i32
0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
  %2 = tail call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x
float> %1, <4 x float> %v3, i8 0)

The vinsertf128 intrinsic is converted into an insert_subvector node
in SelectionDAGBuilder.cpp.

Using AVX, without the patch this generates two vinsertf128 instructions:

vinsertf128 $1, %xmm1, %ymm0, %ymm0
vinsertf128 $0, %xmm2, %ymm0, %ymm0

With the patch this is optimized into:

vinsertf128 $1, %xmm1, %ymm2, %ymm0

Patch by Robert Lougher.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200506 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 01:10:35 +00:00
..
AArch64 [AArch64] Custom lower concat_vector patterns with v4i16, v4i32, v8i8, v8i16, v16i8 types. 2014-01-30 21:46:54 +00:00
ARM PGO branch weight: update edge weights in SelectionDAGBuilder. 2014-01-31 00:42:44 +00:00
CPP Begin adding docs and IR-level support for the inalloca attribute 2013-12-19 02:14:12 +00:00
Generic Additional fix for 200201: due to dependence on bitwidth test was moved to X86 directory. 2014-01-27 09:43:10 +00:00
Hexagon Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Mips [mips][msa] Add fill.d instruction. 2014-01-29 15:12:02 +00:00
MSP430 Fix known typos 2014-01-24 17:20:08 +00:00
NVPTX [NVPTX] Fix emitting aggregate parameters 2014-01-28 18:35:29 +00:00
PowerPC Handle spilling the PPC GPRC_NOR0 register class 2014-01-28 05:32:58 +00:00
R600 R600/SI: Add pattern for truncating i32 to i1 2014-01-28 03:01:16 +00:00
SPARC Implement SPARCv9 atomic_swap_64 with a pseudo. 2014-01-30 04:48:46 +00:00
SystemZ XFAIL test/CodeGen/SystemZ/alias-01.ll which requires CodeGen TBAA 2014-01-25 19:31:44 +00:00
Thumb CodeGen: Stop treating vectors as aggregates 2014-01-21 22:46:46 +00:00
Thumb2 PGO branch weight: update edge weights in IfConverter. 2014-01-29 23:18:47 +00:00
X86 This patch teaches the DAGCombiner how to fold insert_subvector nodes 2014-01-31 01:10:35 +00:00
XCore Fix broken CHECK lines. 2014-01-11 21:06:00 +00:00