David Greene 065f259ff5 Allow multiclass def names to contain "#NAME"" where TableGen replaces ... #NAME# with the name of the defm instantiating the multiclass. This is useful for AVX instruction naming where a "V" prefix is standard throughout the ISA. For example: multiclass SSE_AVX_Inst<...> { def SS : Instr<...>; def SD : Instr<...>; def PS : Instr<...>; def PD : Instr<...>; def V#NAME#SS : Instr<...>; def V#NAME#SD : Instr<...>; def V#NAME#PS : Instr<...>; def V#NAME#PD : Instr<...>; } defm ADD : SSE_AVX_Inst<...>; Results in ADDSS ADDSD ADDPS ADDPD VADDSS VADDSD VADDPS VADDPD git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70979 91177308-0d34-0410-b5e6-96231b3b80d8		2009-05-05 16:28:25 +00:00
..
2003-08-03-PassCode.td
2006-09-18-LargeInt.td
AnonDefinitionOnDemand.td
BitsInitOverflow.td
CStyleComment.td
DagDefSubst.ll
DagIntSubst.ll
DefmInherit.td	Allow defm to inherit from multiple multiclasses.	2009-04-22 22:17:51 +00:00
dg.exp
ForwardRef.td
GeneralList.td
Include.inc
Include.td
IntBitInit.td
LazyChange.td
ListConversion.td
ListSlices.td
MultiClass.td
MultiClassDefName.td	Allow multiclass def names to contain "#NAME"" where TableGen replaces	2009-05-05 16:28:25 +00:00
MultiClassInherit.td	Fix multiclass inheritance to limit value resolution to new defs added	2009-04-24 16:55:41 +00:00
nameconcat.td	Make BinOps typed and require a type specifier for !nameconcat. This	2009-04-23 21:25:15 +00:00
nested-comment.td
strconcat.td
String.td
SuperSubclassSameName.td
TargetInstrInfo.td
TemplateArgRename.td
Tree.td
TreeNames.td
UnterminatedComment.td