Anitha Boyapati 0aa63fcbcb FMA3 tests on bdver2 target for changes made in rev 162012. Also made ...

corresponding changes to existing tests for darwin triple to ensure that
same pattern is tested for bdver2 target.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162655 91177308-0d34-0410-b5e6-96231b3b80d8

2012-08-27 06:59:01 +00:00

..

ARM

Rejected 169195. As Duncan commented, bitcasting to proper type is wrong approach. We need to insert some valid TRANCATE node here.

2012-08-22 09:33:55 +00:00

CellSPU

Add test triples to fix win32 failures. Revert workaround from r161292.

2012-08-08 20:31:37 +00:00

CPP

test commit

2012-07-18 17:53:05 +00:00

Generic

BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle

2012-08-24 18:14:27 +00:00

Hexagon

Infer instruction properties from single-instruction patterns.

2012-08-24 22:46:53 +00:00

MBlaze

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Mips

Disable Mips' delay slot filler when optimization level is O0.

2012-08-24 20:40:15 +00:00

MSP430

Reapply r161633-161634 "Partition use lists so defs always come before uses.""

2012-08-10 00:21:30 +00:00

NVPTX

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PowerPC

Lower constant pools and jump tables via TOC on PPC64/SVR4.

2012-08-24 16:26:02 +00:00

SPARC

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Thumb

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Thumb2

Add ADD and SUB to the predicable ARM instructions.

2012-08-16 23:21:55 +00:00

X86

FMA3 tests on bdver2 target for changes made in rev 162012. Also made

2012-08-27 06:59:01 +00:00

XCore

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