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074e489dbc
Match reductions starting at binary operation feeding into a phi. The code handles trees like r += v1 + v2 + v3 ... and r += v1 r += v2 ... and r *= v1 + v2 + ... We currently only handle associative operations (add, fadd fast). The code can now also handle reductions feeding into stores. a[i] = v1 + v2 + v3 + ... The code is currently disabled behind the flag "-slp-vectorize-hor". The cost model for most architectures is not there yet. I found one opportunity of a horizontal reduction feeding a phi in TSVC (LoopRerolling-flt) and there are several opportunities where reductions feed into stores. radar://14607682 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191108 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
ADCE | ||
ArgumentPromotion | ||
BBVectorize | ||
BranchFolding | ||
CodeExtractor | ||
CodeGenPrepare | ||
ConstantMerge | ||
ConstProp | ||
CorrelatedValuePropagation | ||
DeadArgElim | ||
DeadStoreElimination | ||
DebugIR | ||
EarlyCSE | ||
FunctionAttrs | ||
GCOVProfiling | ||
GlobalDCE | ||
GlobalOpt | ||
GVN | ||
IndVarSimplify | ||
Inline | ||
InstCombine | ||
InstSimplify | ||
Internalize | ||
IPConstantProp | ||
JumpThreading | ||
LCSSA | ||
LICM | ||
LoopDeletion | ||
LoopIdiom | ||
LoopRotate | ||
LoopSimplify | ||
LoopStrengthReduce | ||
LoopUnroll | ||
LoopUnswitch | ||
LoopVectorize | ||
LowerAtomic | ||
LowerExpectIntrinsic | ||
LowerInvoke | ||
LowerSwitch | ||
Mem2Reg | ||
MemCpyOpt | ||
MergeFunc | ||
MetaRenamer | ||
ObjCARC | ||
PhaseOrdering | ||
PruneEH | ||
Reassociate | ||
Reg2Mem | ||
ScalarRepl | ||
SCCP | ||
SimplifyCFG | ||
Sink | ||
SLPVectorizer | ||
SROA | ||
StripSymbols | ||
StructurizeCFG | ||
TailCallElim | ||
TailDup |