mirror of
https://github.com/c64scene-ar/llvm-6502.git
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076fd5dfc1
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics. Previously, DIVariable was a variable-length field that has an optional reference to a Metadata array consisting of a variable number of complex address expressions. In the case of OpPiece expressions this is wasting a lot of storage in IR, because when an aggregate type is, e.g., SROA'd into all of its n individual members, the IR will contain n copies of the DIVariable, all alike, only differing in the complex address reference at the end. By making the complex address into an extra argument of the dbg.value/dbg.declare intrinsics, all of the pieces can reference the same variable and the complex address expressions can be uniqued across the CU, too. Down the road, this will allow us to move other flags, such as "indirection" out of the DIVariable, too. The new intrinsics look like this: declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr) declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr) This patch adds a new LLVM-local tag to DIExpressions, so we can detect and pretty-print DIExpression metadata nodes. What this patch doesn't do: This patch does not touch the "Indirect" field in DIVariable; but moving that into the expression would be a natural next step. http://reviews.llvm.org/D4919 rdar://problem/17994491 Thanks to dblaikie and dexonsmith for reviewing this patch! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218778 91177308-0d34-0410-b5e6-96231b3b80d8
71 lines
4.2 KiB
LLVM
71 lines
4.2 KiB
LLVM
; RUN: opt < %s -S -loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -dce -instcombine | FileCheck %s
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; Make sure we vectorize with debugging turned on.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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@A = global [1024 x i32] zeroinitializer, align 16
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@B = global [1024 x i32] zeroinitializer, align 16
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@C = global [1024 x i32] zeroinitializer, align 16
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; CHECK-LABEL: @test(
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define i32 @test() #0 {
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entry:
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tail call void @llvm.dbg.value(metadata !1, i64 0, metadata !9, metadata !{}), !dbg !18
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br label %for.body, !dbg !18
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for.body:
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;CHECK: load <4 x i32>
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds [1024 x i32]* @B, i64 0, i64 %indvars.iv, !dbg !19
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%0 = load i32* %arrayidx, align 4, !dbg !19
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%arrayidx2 = getelementptr inbounds [1024 x i32]* @C, i64 0, i64 %indvars.iv, !dbg !19
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%1 = load i32* %arrayidx2, align 4, !dbg !19
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%add = add nsw i32 %1, %0, !dbg !19
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%arrayidx4 = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv, !dbg !19
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store i32 %add, i32* %arrayidx4, align 4, !dbg !19
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%indvars.iv.next = add i64 %indvars.iv, 1, !dbg !18
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tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !9, metadata !{}), !dbg !18
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32, !dbg !18
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%exitcond = icmp ne i32 %lftr.wideiv, 1024, !dbg !18
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br i1 %exitcond, label %for.body, label %for.end, !dbg !18
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for.end:
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ret i32 0, !dbg !24
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}
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declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
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declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
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attributes #0 = { nounwind ssp uwtable "fp-contract-model"="standard" "no-frame-pointer-elim" "no-frame-pointer-elim-non-leaf" "relocation-model"="pic" "ssp-buffers-size"="8" }
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attributes #1 = { nounwind readnone }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!26}
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!0 = metadata !{i32 786449, metadata !25, i32 4, metadata !"clang", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !2, metadata !11, null, metadata !""}
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!1 = metadata !{i32 0}
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!2 = metadata !{metadata !3}
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!3 = metadata !{i32 786478, metadata !25, metadata !4, metadata !"test", metadata !"test", metadata !"test", i32 5, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 ()* @test, null, null, metadata !8, i32 5}
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!4 = metadata !{i32 786473, metadata !25}
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!5 = metadata !{i32 786453, i32 0, null, i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !6, i32 0, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
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!6 = metadata !{metadata !7}
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!7 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}
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!8 = metadata !{metadata !9}
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!9 = metadata !{i32 786688, metadata !10, metadata !"i", metadata !4, i32 6, metadata !7, i32 0, i32 0}
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!10 = metadata !{i32 786443, metadata !25, metadata !3, i32 6, i32 0, i32 0}
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!11 = metadata !{metadata !12, metadata !16, metadata !17}
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!12 = metadata !{i32 786484, i32 0, null, metadata !"A", metadata !"A", metadata !"", metadata !4, i32 1, metadata !13, i32 0, i32 1, [1024 x i32]* @A, null}
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!13 = metadata !{i32 786433, null, null, null, i32 0, i64 32768, i64 32, i32 0, i32 0, metadata !7, metadata !14, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 32768, align 32, offset 0] [from int]
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!14 = metadata !{metadata !15}
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!15 = metadata !{i32 786465, i64 0, i64 1024}
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!16 = metadata !{i32 786484, i32 0, null, metadata !"B", metadata !"B", metadata !"", metadata !4, i32 2, metadata !13, i32 0, i32 1, [1024 x i32]* @B, null}
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!17 = metadata !{i32 786484, i32 0, null, metadata !"C", metadata !"C", metadata !"", metadata !4, i32 3, metadata !13, i32 0, i32 1, [1024 x i32]* @C, null}
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!18 = metadata !{i32 6, i32 0, metadata !10, null}
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!19 = metadata !{i32 7, i32 0, metadata !20, null}
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!20 = metadata !{i32 786443, metadata !25, metadata !10, i32 6, i32 0, i32 1}
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!24 = metadata !{i32 9, i32 0, metadata !3, null}
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!25 = metadata !{metadata !"test", metadata !"/path/to/somewhere"}
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!26 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
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