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llvm-6502/include/llvm/Target
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Chad Rosier 5b3fca50a0 The getRegForInlineAsmConstraint function should only accept MVT value types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-22 18:37:38 +00:00
..
CostTable.h
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Mangler.h
Don't reach into the middle of TargetMachine and cache one of its ivars.
2013-05-29 20:37:19 +00:00
Target.td
Make SubRegIndex size mandatory, following r183020.
2013-05-31 23:45:26 +00:00
TargetCallingConv.h
Remove unused, undefined ArgFlagsTy::getArgFlagsString; add a comment about 'returned'
2013-04-21 18:05:20 +00:00
TargetCallingConv.td
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TargetFrameLowering.h
Provide the register scavenger to processFunctionBeforeFrameFinalized
2013-03-14 20:33:40 +00:00
TargetInstrInfo.h
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
2013-06-16 20:34:27 +00:00
TargetIntrinsicInfo.h
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TargetItinerary.td
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TargetJITInfo.h
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TargetLibraryInfo.h
Convert sqrt functions into sqrt instructions when -ffast-math is in effect.
2013-05-27 15:44:35 +00:00
TargetLowering.h
The getRegForInlineAsmConstraint function should only accept MVT value types.
2013-06-22 18:37:38 +00:00
TargetLoweringObjectFile.h
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TargetMachine.h
Directly access objects which may change during compilation.
2013-06-17 20:41:25 +00:00
TargetOpcodes.h
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TargetOptions.h
Remove static, because it was messing everything up.
2013-06-20 06:51:06 +00:00
TargetRegisterInfo.h
Add TargetRegisterInfo::getCoveringLanes().
2013-05-16 18:03:08 +00:00
TargetSchedule.td
Support BufferSize on ProcResGroup for unified MOp schedulers.
2013-06-15 04:50:06 +00:00
TargetSelectionDAG.td
Create an FPOW SDNode opcode def in the target independent .td file rather than in a specific backend.
2013-05-22 06:36:09 +00:00
TargetSelectionDAGInfo.h
Track IR ordering of SelectionDAG nodes 2/4.
2013-05-25 02:42:55 +00:00
TargetSubtargetInfo.h
Use the 'target-features' and 'target-cpu' attributes to reset the subtarget features.
2013-02-15 22:31:27 +00:00