llvm-6502/test/CodeGen
Daniel Sanders 6fdef5ecd7 [mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex.
This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s
when the stack frame is between 512 and 32,768 bytes in size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195973 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-30 13:47:57 +00:00
..
AArch64 AArch64: The pattern match should check the range of the immediate value. 2013-11-29 02:11:22 +00:00
ARM Darwin-ARM: use movw/movt for static relocations 2013-11-26 12:45:05 +00:00
CPP
Generic Revert r195317 (and r195333), "Teach ISel not to optimize 'optnone' functions." 2013-11-21 10:55:15 +00:00
Hexagon Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Mips [mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex. 2013-11-30 13:47:57 +00:00
MSP430
NVPTX [NVPTX] Fix handling of indirect calls 2013-11-15 12:30:04 +00:00
PowerPC Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
R600 R600: Expand vector FABS 2013-11-27 21:23:39 +00:00
SPARC [Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of sethi+or. This generates correct code for both sparc32 and sparc64. 2013-11-24 20:23:25 +00:00
SystemZ [SystemZ] Fix incorrect use of RISBG for a zero-extended right shift 2013-11-26 10:53:16 +00:00
Thumb Use FileCheck and expand the test a bit. 2013-11-27 19:22:14 +00:00
Thumb2 Enable generating legacy IT block for AArch32 2013-11-13 18:29:49 +00:00
X86 Force CPU type to unbreak unit tests on Haswell machines. 2013-11-30 03:07:16 +00:00
XCore Error if we see an alias to a declaration. 2013-11-14 13:58:06 +00:00