Chandler Carruth 06a07dadb9 [x86] Add some tests for a common unpack pattern of vector shuffle that ...

has a remarkably unique and efficient lowering.

While we get this some of the time already, we miss a few cases and
there wasn't a principled reason we got it. We should at least test
this. v8 already has tests for this pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222607 91177308-0d34-0410-b5e6-96231b3b80d8

2014-11-22 05:44:43 +00:00

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AArch64

DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same divisor info FMULs by the reciprocal.

2014-11-21 06:39:58 +00:00

ARM

Fix ARM triple parsing

2014-11-17 14:08:57 +00:00

CPP

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Generic

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Hexagon

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Inputs

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Mips

[mips][microMIPS] This patch implements functionality in MIPS delay slot

2014-11-21 22:04:35 +00:00

MSP430

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NVPTX

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PowerPC

[PPC] Use SeparateConstOffsetFromGEP

2014-11-21 04:35:51 +00:00

R600

R600/SI: Add a failing test case for offset order in ds_read2 instructions

2014-11-21 22:31:47 +00:00

SPARC

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SystemZ

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Thumb

[Thumb1] Re-write emitThumbRegPlusImmediate

2014-11-17 11:18:10 +00:00

Thumb2

ARM: allow constpool entry to be moved to the user's block in all cases.

2014-11-13 17:58:53 +00:00

X86

[x86] Add some tests for a common unpack pattern of vector shuffle that

2014-11-22 05:44:43 +00:00

XCore

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