llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-14 00:32:55 +00:00

History

Hal Finkel 089a5f8a8c DAGCombiner: Constant folding around pre-increment loads/stores

Previously, even when a pre-increment load or store was generated,
we often needed to keep a copy of the original base register for use
with other offsets. If all of these offsets are constants (including
the offset which was combined into the addressing mode), then this is
clearly unnecessary. This change adjusts these other offsets to use the
new incremented address.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174746 91177308-0d34-0410-b5e6-96231b3b80d8

2013-02-08 21:35:47 +00:00

Analysis

ARM cost model: Address computation in vector mem ops not free

2013-02-08 14:50:48 +00:00

Archive

…

AsmParser

Parse the attribute group reference on a function.

2013-02-08 06:32:06 +00:00

Bitcode

Code Custodian (trivial whitespace cleanup)

2013-02-06 22:14:06 +00:00