llvm-6502

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History

Jakob Stoklund Olesen 098c6a547f Use predication instead of pseudo-opcodes when folding into MOVCC.

Now that it is possible to dynamically tie MachineInstr operands,
predicated instructions are possible in SSA form:

  %vreg3<def> = SUBri %vreg1, -2147483647, pred:14, pred:%noreg, %opt:%noreg
  %vreg4<def,tied1> = MOVCCr %vreg3<tied0>, %vreg1, %pred:12, pred:%CPSR

Becomes a predicated SUBri with a tied imp-use:

  SUBri %vreg1, -2147483647, pred:13, pred:%CPSR, opt:%noreg, %vreg1<imp-use,tied0>

This means that any instruction that is safe to move can be folded into
a MOVCC, and the *CC pseudo-instructions are no longer needed.

The test case changes reflect that Thumb2SizeReduce recognizes the
predicated instructions. It didn't understand the pseudos.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163274 91177308-0d34-0410-b5e6-96231b3b80d8

2012-09-05 23:58:02 +00:00

Analysis

JumpThreading: when default destination is the destination of some cases in a

2012-09-05 23:45:58 +00:00

Archive

Mark checkSignature const, and in turn stop casting away const from

2012-09-05 22:09:23 +00:00

AsmParser

[ms-inline asm] Enumerate the InlineAsm dialects and rename the nsdialect to

2012-09-05 19:00:49 +00:00

Bitcode

[ms-inline asm] Enumerate the InlineAsm dialects and rename the nsdialect to