llvm-6502/test/MC/Disassembler
Tim Northover 0a088b1fc5 ARM64: print correct aliases for NEON mov & mvn instructions
In all cases, if a "mov" alias exists, it is the canonical form of the
instruction. Now that TableGen can support aliases containing syntax variants,
we can enable them and improve the quality of the asm output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208874 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 12:11:02 +00:00
..
AArch64 TableGen/ARM64: print aliases even if they have syntax variants. 2014-05-15 11:16:32 +00:00
ARM ARM: implement support for the UDF mnemonic 2014-05-14 03:47:39 +00:00
ARM64 ARM64: print correct aliases for NEON mov & mvn instructions 2014-05-15 12:11:02 +00:00
Mips [mips] Move disassembler test (test_2r_msa64) into correct folder. 2014-05-12 16:59:34 +00:00
PowerPC
Sparc
SystemZ
X86
XCore