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2182c785c2
* Reduce number of #includes, sometimes drastically (LiveRangeInfo.h lost _7_) * Move instrIsFeasible() from InstrScheduling.h to SchedPriorities.h * Delete blank lines at end of files git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1672 91177308-0d34-0410-b5e6-96231b3b80d8
131 lines
4.9 KiB
C++
131 lines
4.9 KiB
C++
// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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// InstrSelectionSupport.h
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//
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// Purpose:
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// Target-independent instruction selection code.
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// See SparcInstrSelection.cpp for usage.
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//
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// History:
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// 10/10/01 - Vikram Adve - Created
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//**************************************************************************/
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#ifndef LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
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#define LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
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#include "llvm/Instruction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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class InstructionNode;
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class TargetMachine;
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//---------------------------------------------------------------------------
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// Function GetConstantValueAsSignedInt
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//
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// Convenience function to get the value of an integer constant, for an
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// appropriate integer or non-integer type that can be held in an integer.
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// The type of the argument must be the following:
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// Signed or unsigned integer
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// Boolean
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// Pointer
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//
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// isValidConstant is set to true if a valid constant was found.
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//---------------------------------------------------------------------------
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int64_t GetConstantValueAsSignedInt (const Value *V,
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bool &isValidConstant);
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//---------------------------------------------------------------------------
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// Function: FoldGetElemChain
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//
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// Purpose:
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// Fold a chain of GetElementPtr instructions into an equivalent
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// (Pointer, IndexVector) pair. Returns the pointer Value, and
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// stores the resulting IndexVector in argument chainIdxVec.
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//---------------------------------------------------------------------------
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Value* FoldGetElemChain (const InstructionNode* getElemInstrNode,
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std::vector<Value*>& chainIdxVec);
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//------------------------------------------------------------------------
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// Function Set2OperandsFromInstr
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// Function Set3OperandsFromInstr
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//
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// Purpose:
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//
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// For the common case of 2- and 3-operand arithmetic/logical instructions,
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// set the m/c instr. operands directly from the VM instruction's operands.
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// Check whether the first or second operand is 0 and can use a dedicated
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// "0" register.
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// Check whether the second operand should use an immediate field or register.
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// (First and third operands are never immediates for such instructions.)
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//
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// Arguments:
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// canDiscardResult: Specifies that the result operand can be discarded
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// by using the dedicated "0"
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//
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// op1position, op2position and resultPosition: Specify in which position
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// in the machine instruction the 3 operands (arg1, arg2
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// and result) should go.
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//
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// RETURN VALUE: unsigned int flags, where
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// flags & 0x01 => operand 1 is constant and needs a register
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// flags & 0x02 => operand 2 is constant and needs a register
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//------------------------------------------------------------------------
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void Set2OperandsFromInstr (MachineInstr* minstr,
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InstructionNode* vmInstrNode,
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const TargetMachine& targetMachine,
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bool canDiscardResult = false,
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int op1Position = 0,
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int resultPosition = 1);
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void Set3OperandsFromInstr (MachineInstr* minstr,
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InstructionNode* vmInstrNode,
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const TargetMachine& targetMachine,
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bool canDiscardResult = false,
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int op1Position = 0,
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int op2Position = 1,
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int resultPosition = 2);
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//---------------------------------------------------------------------------
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// Function: ChooseRegOrImmed
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//
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// Purpose:
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//
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//---------------------------------------------------------------------------
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MachineOperand::MachineOperandType ChooseRegOrImmed(
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Value* val,
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MachineOpCode opCode,
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const TargetMachine& targetMachine,
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bool canUseImmed,
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unsigned int& getMachineRegNum,
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int64_t& getImmedValue);
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//---------------------------------------------------------------------------
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// Function: FixConstantOperandsForInstr
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//
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// Purpose:
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// Special handling for constant operands of a machine instruction
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// -- if the constant is 0, use the hardwired 0 register, if any;
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// -- if the constant fits in the IMMEDIATE field, use that field;
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// -- else create instructions to put the constant into a register, either
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// directly or by loading explicitly from the constant pool.
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//
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// In the first 2 cases, the operand of `minstr' is modified in place.
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// Returns a vector of machine instructions generated for operands that
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// fall under case 3; these must be inserted before `minstr'.
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//---------------------------------------------------------------------------
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std::vector<MachineInstr*> FixConstantOperandsForInstr (Instruction* vmInstr,
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MachineInstr* minstr,
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TargetMachine& target);
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#endif
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