llvm-6502/test/CodeGen
Chad Rosier 1243922fc1 Remove the X86 Maximal Stack Alignment Check pass as it is no longer necessary.
This pass was conservative in that it always reserved the FP to enable dynamic
stack realignment, which allowed the RA to use aligned spills for vector
registers.  This happens even when spills were not necessary.  The RA has 
since been improved to use unaligned spills when necessary.

The new behavior is to realign the stack if the frame pointer was already
reserved for some other reason, but don't reserve the frame pointer just
because a function contains vector virtual registers.

Part of rdar://12719844

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168627 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 22:55:05 +00:00
..
ARM Fix physical register liveness calculations: 2012-11-20 09:56:11 +00:00
CPP
Generic
Hexagon test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the failure on i686 hosts. 2012-11-14 22:22:37 +00:00
MBlaze
Mips [mips] Generate big GOT code. 2012-11-21 20:40:38 +00:00
MSP430 Add support for varargs functions for msp430. 2012-11-21 17:28:27 +00:00
NVPTX [NVPTX] Order global variables in def-use order before emiting them in the final assembly 2012-11-16 21:03:51 +00:00
PowerPC Rewrite test to not use a FileCheck variable and redefine it on the same line. 2012-11-26 14:09:46 +00:00
SPARC
Thumb
Thumb2
X86 Remove the X86 Maximal Stack Alignment Check pass as it is no longer necessary. 2012-11-26 22:55:05 +00:00
XCore Fix handling of aliases to functions. 2012-11-16 21:12:38 +00:00