Zoran Jovanovic 0c7ac480e2 [mips][mips64r6] Add LDPC instruction ...

Differential Revision: http://reviews.llvm.org/D3822


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210460 91177308-0d34-0410-b5e6-96231b3b80d8

2014-06-09 09:49:51 +00:00

..

invalid-mips1-wrong-error.s

[mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6

2014-05-23 13:18:02 +00:00

invalid-mips1.s

[mips][mips64r6] addi is not available on MIPS32r6/MIPS64r6

2014-05-22 11:42:31 +00:00

invalid-mips2.s

[mips][mips64r6] t(eq|ge|lt|ne)i and t(ge|lt)iu are not available in MIPS32r6/MIPS64r6

2014-05-23 13:24:08 +00:00

invalid-mips3-wrong-error.s

[mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6

2014-05-23 13:18:02 +00:00

invalid-mips3.s

[mips][mips64r6] t(eq|ge|lt|ne)i and t(ge|lt)iu are not available in MIPS32r6/MIPS64r6

2014-05-23 13:24:08 +00:00

invalid-mips5-wrong-error.s

[mips][mips64r6] Test that paired single instructions are invalid

2014-05-22 11:37:38 +00:00

relocations.s

[mips][mips64r6] Add Relocations R_MIPS_PCHI16, R_MIPS_PCLO16

2014-05-27 14:58:51 +00:00

valid-xfail.s

[mips][mips64r6] Add b[on]vc

2014-05-22 11:23:21 +00:00

valid.s

[mips][mips64r6] Add LDPC instruction

2014-06-09 09:49:51 +00:00