llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-02 04:24:22 +00:00

Files

Benjamin Kramer 0c7ba3cef2 SLPVectorizer: When CSEing generated gathers only scan blocks containing them.

Instead of doing a RPO traversal of the whole function remember the blocks
containing gathers (typically <= 2) and scan them in dominator-first order.

The actual CSE is still quadratic, but I'm not confident that adding a
scoped hash table here is worth it as we're only looking at the generated
instructions and not arbitrary code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193956 91177308-0d34-0410-b5e6-96231b3b80d8

2013-11-03 12:27:52 +00:00

Hello

First check in. Modified a comment.

2013-09-27 07:36:10 +00:00

InstCombine

Remove x86_sse42_crc32_64_8 intrinsic. It has no functional difference from x86_sse42_crc32_32_8 and was not mapped to a clang builtin. I'm not even sure why this form of the instruction is even called out explicitly in the docs. Also add AutoUpgrade support to convert it into the other intrinsic with appropriate trunc and zext.

2013-10-15 05:20:47 +00:00

Instrumentation

fix PR17635: false positive with packed structures

2013-10-24 09:17:24 +00:00

IPO

Spell "Actual" correctly