Files
llvm-6502/test/CodeGen/MIR/machine-function.mir
Alex Lorenz c9a4f3d5d9 MIR Serialization: Serialize simple MachineRegisterInfo attributes.
This commit serializes the 3 scalar boolean attributes from the
MachineRegisterInfo class: IsSSA, TracksRegLiveness, and
TracksSubRegLiveness. These attributes are serialized as part
of the machine function YAML mapping.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10618


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240579 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 19:56:10 +00:00

59 lines
1.1 KiB
YAML

# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
# This test ensures that the MIR parser parses machine functions correctly.
--- |
define i32 @foo() {
ret i32 0
}
define i32 @bar() {
ret i32 0
}
define i32 @func() {
ret i32 0
}
define i32 @func2() {
ret i32 0
}
...
---
# CHECK: name: foo
# CHECK-NEXT: alignment:
# CHECK-NEXT: exposesReturnsTwice: false
# CHECK-NEXT: hasInlineAsm: false
# CHECK: ...
name: foo
...
---
# CHECK: name: bar
# CHECK-NEXT: alignment:
# CHECK-NEXT: exposesReturnsTwice: false
# CHECK-NEXT: hasInlineAsm: false
# CHECK: ...
name: bar
...
---
# CHECK: name: func
# CHECK-NEXT: alignment: 8
# CHECK-NEXT: exposesReturnsTwice: false
# CHECK-NEXT: hasInlineAsm: false
# CHECK: ...
name: func
alignment: 8
...
---
# CHECK: name: func2
# CHECK-NEXT: alignment: 16
# CHECK-NEXT: exposesReturnsTwice: true
# CHECK-NEXT: hasInlineAsm: true
# CHECK: ...
name: func2
alignment: 16
exposesReturnsTwice: true
hasInlineAsm: true
...