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754aaee387
* Add masking instructions before loads and stores (in MC layer). * Add masking instructions after SP changes (in MC layer). * Forbid loads, stores and SP changes in delay slots (in MI layer). Differential Revision: http://llvm-reviews.chandlerc.com/D2904 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203484 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
1.0 KiB
C++
33 lines
1.0 KiB
C++
//===-- MipsMCNaCl.h - NaCl-related declarations --------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MIPSMCNACL_H
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#define MIPSMCNACL_H
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#include "llvm/MC/MCELFStreamer.h"
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namespace llvm {
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// Log2 of the NaCl MIPS sandbox's instruction bundle size.
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static const unsigned MIPS_NACL_BUNDLE_ALIGN = 4u;
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bool isBasePlusOffsetMemoryAccess(unsigned Opcode, unsigned *AddrIdx,
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bool *IsStore = NULL);
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bool baseRegNeedsLoadStoreMask(unsigned Reg);
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// This function creates an MCELFStreamer for Mips NaCl.
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MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB,
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raw_ostream &OS,
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MCCodeEmitter *Emitter,
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bool RelaxAll, bool NoExecStack);
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}
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#endif
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