Justin Holewinski 0df3ce333b [NVPTX] Fix logic error in loading vector parameters of more than 4 components ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194409 91177308-0d34-0410-b5e6-96231b3b80d8		2013-11-11 19:28:16 +00:00
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AArch64	[AArch64] The shift right/left and insert immediate builtins expect 3	2013-11-11 19:11:11 +00:00
ARM	[VirtRegMap] Fix for PR17825. Do not ignore noreturn definitions when setting	2013-11-08 18:14:17 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Vector forms of SHL, SRA, and SRL can be constant folded using SimplifyVBinOp too	2013-11-11 17:23:41 +00:00
MSP430	Make sure SP is always aligned on a 2 byte boundary	2013-10-24 09:32:31 +00:00
NVPTX	[NVPTX] Fix logic error in loading vector parameters of more than 4 components	2013-11-11 19:28:16 +00:00
PowerPC	Add PPC option for full register names in asm	2013-11-11 14:58:40 +00:00
R600	R600: Fix LowerUDIVREM	2013-11-06 17:36:04 +00:00
SPARC	[SparcV9] Handle i64 <-> float conversions in sparcv9 mode.	2013-11-03 12:28:40 +00:00
SystemZ	[SystemZ] Automatically detect zEC12 and z196 hosts	2013-10-31 12:14:17 +00:00
Thumb	17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets	2013-10-17 19:52:05 +00:00
Thumb2
X86	[Stackmap] Materialize the jump address within the patchpoint noop slide.	2013-11-09 01:51:33 +00:00
XCore